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path: root/drivers/clk/imx (follow)
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* clk: imx: add ocram_s clock for i.mx6sxAnson Huang2018-07-251-0/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-06-095-18/+40
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| * Merge branch 'clk-imx6ul' into clk-nextStephen Boyd2018-06-041-1/+1
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| | * clk: imx6ul: fix periph clk2 clock mux selectionStefan Agner2018-05-051-1/+1
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| *---. \ Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and...Stephen Boyd2018-06-042-1/+5
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| | | | * clk: imx6: add EPIT clock supportColin Didier2018-06-021-0/+2
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| | * | clk: imx7d: reset parent for mipi csi rootRui Miguel Silva2018-06-011-0/+2
| | * | clk: imx7d: fix mipi dphy div parentRui Miguel Silva2018-06-011-1/+1
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| *---. | Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-nextStephen Boyd2018-06-043-16/+16
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| | | * | clk: imx7d: correct enet clock CCGR registersAnson Huang2018-06-011-4/+6
| | | * | clk: imx7d: correct enet phy ref clock gatesAnson Huang2018-06-011-2/+1
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| | * | clk: imx6sl: correct ocram_podf clock typeAnson Huang2018-06-011-1/+1
| | * | clk: imx6sx: disable unnecessary clocks during clock initializationAnson Huang2018-06-011-6/+1
| | * | clk: imx6sx: add missing lvds2 clock to the clock treeAnson Huang2018-05-051-3/+7
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| * / clk: imx: Add new clo01 and clo2 controlled by CCOSRMichael Trimarchi2018-05-161-0/+18
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* / clk: imx6ull: use OSC clock during AXI rate changeStefan Agner2018-05-161-1/+1
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-04-148-61/+436
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| *-. Merge branches 'clk-stratix10', 'clk-imx', 'clk-bcm', 'clk-cs2000' and 'clk-i...Stephen Boyd2018-04-068-61/+439
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| | | * clk: imx: add clock driver for imx6sllBai Ping2018-04-062-0/+341
| | | * clk: imx: add new gate/gate2 wrapper funtionBai Ping2018-04-061-0/+14
| | | * clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy muxBai Ping2018-04-061-2/+2
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| | * clk: imx7d: Move clks_init_on before any clock operationsDong Aisheng2018-04-061-7/+7
| | * clk: imx7d: Correct ahb clk parent selectAnson Huang2018-04-061-1/+1
| | * clk: imx7d: Correct dram pll typeAnson Huang2018-04-061-1/+3
| | * clk: imx7d: Add USB clock informationPeter Chen2018-04-061-1/+8
| | * clk: imx: pllv2: avoid using uninitialized valuesLucas Stach2018-03-161-1/+5
| | * Merge tag 'clk-imx-4.17-misc' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2018-03-143-48/+55
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| | | * clk: imx6ull: Add epdc_podf instead of sim_podfLeonard Crestez2018-03-131-1/+4
| | | * clk: imx: imx7d: correct video pll clock treeAnson Huang2018-03-011-40/+44
| | | * clk: imx: imx6sx: update cko mux optionsAnson Huang2018-02-221-7/+7
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* | | Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/ar...Linus Torvalds2018-04-061-0/+3
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| * | clk: imx: imx7d: add the Keypad Port module clockStefan Agner2018-02-281-0/+1
| * | clk: imx7d: add CAAM clockRui Miguel Silva2018-02-281-0/+1
| * | clk: imx: imx7d: add the snvs clockAnson Huang2018-02-221-0/+1
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* / clk: imx51-imx53: Fix UART4/5 registration on i.MX50 and i.MX53Fabio Estevam2018-02-221-3/+17
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* clk: imx51: uart4, uart5 gates only exist on imx50, imx53Philipp Zabel2017-12-221-4/+8
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2017-11-187-17/+8
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| * Merge branch 'clk-imx' into clk-nextStephen Boyd2017-11-143-12/+3
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| | * clk: imx: imx7d: Remove ARM_M0 clockAdriana Reus2017-11-021-9/+0
| | * clk: imx: imx7d: Fix parent clock for OCRAM_CLKAdriana Reus2017-11-021-1/+1
| | * clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent ratePhilipp Zabel2017-11-021-1/+1
| | * clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPUSébastien Szymanski2017-11-021-1/+1
| * | clk: imx: make clk_ops constBhumika Goyal2017-11-024-5/+5
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* / License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-026-0/+6
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* clk: imx51: propagate rate across ipu_di*_selLucas Stach2017-08-311-4/+4
* clk: imx: constify clk_div_tableArvind Yadav2017-08-315-12/+12
* clk: imx7d: create clocks behind rawnand clock gateStefan Agner2017-06-201-2/+4
* clk: imx7d: Fix the DDR PLL enable bitFabio Estevam2017-06-071-1/+1
* clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam2017-06-013-1/+7
* clk: imx7d: fix USDHC NAND clockStefan Agner2017-04-191-2/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-20 01:19:03 +0100