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path: root/drivers/clk/imx (follow)
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* clk: imx: Fix fractional clock set rate computationAbel Vesa2019-01-241-2/+3
* clk: imx: fix potential NULL dereference in imx8qxp_lpcg_clk_probe()Wei Yongjun2019-01-091-0/+2
* clk: imx8qxp: make the name of clock ID genericAisheng Dong2018-12-282-151/+151
* Merge branch 'clk-imx7ulp' into clk-nextStephen Boyd2018-12-141-1/+30
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| * clk: imx: imx7ulp: add arm hsrun mode clocks supportAnson Huang2018-12-141-1/+30
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*-------. \ Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp...Stephen Boyd2018-12-1424-26/+3348
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| | | | | * clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependantAbel Vesa2018-12-142-0/+7
| | | | | * clk: imx: remove redundant initialization of ret to zeroColin Ian King2018-12-101-1/+1
| | | | | * clk: imx: Add SCCG PLL typeLucas Stach2018-12-033-1/+267
| | | | | * clk: imx: Add fractional PLL output clockLucas Stach2018-12-033-0/+236
| | | | | * clk: imx: Add clock driver for i.MX8MQ CCMAbel Vesa2018-12-033-0/+626
| | | | | * clk: imx: Add imx composite clockAbel Vesa2018-12-033-0/+195
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| | | | * clk: imx: add imx8qxp lpcg driverAisheng Dong2018-12-143-1/+319
| | | | * clk: imx: add lpcg clock supportAisheng Dong2018-12-143-1/+121
| | | | * clk: imx: add imx8qxp clk driverAisheng Dong2018-12-143-0/+162
| | | | * clk: imx: add scu clock common partAisheng Dong2018-12-144-0/+292
| | | | * clk: imx: add configuration option for mmio clksAisheng Dong2018-12-142-1/+6
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| | | * clk: imx6q: add DCICx clocks gateAnson Huang2018-12-101-0/+2
| | | * clk: imx6sl: ensure MMDC CH0 handshake is bypassedAnson Huang2018-12-101-0/+6
| | | * clk: imx7d: remove UART1 clock settingAnson Huang2018-11-061-3/+0
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| | * clk: imx6q: handle ENET PLL bypassLucas Stach2018-12-101-6/+57
| | * clk: imx6q: optionally get CCM inputs via standard clock handlesLucas Stach2018-12-101-5/+17
| | * clk: imx6q: reset exclusive gates on initLucas Stach2018-12-101-1/+5
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| * clk: imx: add imx7ulp clk driverA.s. Dong2018-12-032-0/+221
| * clk: imx: implement new clk_hw based APIsA.s. Dong2018-12-032-0/+84
| * clk: imx: make mux parent strings constA.s. Dong2018-12-033-9/+13
| * clk: imx: add imx7ulp composite clk supportA.s. Dong2018-12-033-0/+94
| * clk: imx: add pfdv2 supportA.s. Dong2018-12-033-1/+208
| * clk: imx: add pllv4 supportA.s. Dong2018-12-033-0/+188
| * clk: imx: add gatable clock divider supportA.s. Dong2018-12-033-0/+226
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*-. Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp...Stephen Boyd2018-10-195-0/+6
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| * | clk: imx6q: add mmdc0 ipg clockAnson Huang2018-10-171-0/+1
| * | clk: imx6sl: add mmdc ipg clocksAnson Huang2018-10-171-0/+2
| * | clk: imx6sll: add mmdc1 ipg clockAnson Huang2018-10-171-0/+1
| * | clk: imx6sx: add mmdc1 ipg clockAnson Huang2018-10-171-0/+1
| * | clk: imx6ul: add mmdc1 ipg clockAnson Huang2018-10-171-0/+1
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* | clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clkAnson Huang2018-10-171-1/+1
* | clk: imx: cpu clock should be always criticalAnson Huang2018-10-171-1/+1
* | clk: imx: imx7d: remove clks_init_on arrayAnson Huang2018-10-172-19/+15
* | clk: imx: imx7d: remove unnecessary clocks from clks_init_on arrayAnson Huang2018-10-171-2/+1
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*---. Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',...Stephen Boyd2018-08-153-0/+3
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| | * | clk: imx6sll: fix missing of_node_put()Nicholas Mc Guire2018-07-251-0/+1
| | * | clk: imx6ul: fix missing of_node_put()Nicholas Mc Guire2018-07-251-0/+1
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| * / clk: imx: add ocram_s clock for i.mx6sxAnson Huang2018-07-251-0/+1
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*---. \ Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', 'clk-imx-init-a...Stephen Boyd2018-08-154-50/+17
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| | | * clk: imx6sx: remove clks_init_on arrayAnson Huang2018-06-291-26/+14
| | | * clk: imx6sl: remove clks_init_on arrayAnson Huang2018-06-291-12/+0
| | | * clk: imx6q: remove clks_init_on arrayAnson Huang2018-06-291-12/+2
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| | * clk: imx7d: add IMX7D_MU_ROOT_CLKOleksij Rempel2018-07-091-0/+1
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*-. | Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-te...Stephen Boyd2018-08-151-29/+15
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