| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: ingenic: Remove set but not used variable 'enable' | YueHaibing | 2019-02-26 | 1 | -2/+1 |
| * | clk: ingenic: Fix round_rate misbehaving with non-integer dividers | Paul Cercueil | 2019-02-22 | 1 | -5/+5 |
| * | clk: ingenic: Support specifying "wait for clock stable" delay | Paul Cercueil | 2018-06-02 | 1 | -0/+3 |
| * | clk: ingenic: Add support for clocks whose gate bit is inverted | Paul Cercueil | 2018-06-02 | 1 | -2/+3 |
| * | clk: ingenic: Add code to enable/disable PLLs | Paul Cercueil | 2018-01-18 | 1 | -15/+74 |
| * | clk: ingenic: support PLLs with no bypass bit | Paul Cercueil | 2018-01-18 | 1 | -1/+2 |
| * | clk: ingenic: Fix recalc_rate for clocks with fixed divider | Paul Cercueil | 2018-01-18 | 1 | -0/+2 |
| * | Update MIPS email addresses | Paul Burton | 2017-11-03 | 1 | -1/+1 |
| * | clk: ingenic: Allow divider value to be divided | Harvey Hunt | 2016-05-12 | 1 | -1/+10 |
| * | clk: ingenic: Include clk.h | Stephen Boyd | 2015-07-20 | 1 | -0/+1 |
| * | clk: ingenic: add driver for Ingenic SoC CGU clocks | Paul Burton | 2015-06-21 | 1 | -0/+711 |
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