summaryrefslogtreecommitdiffstats
path: root/drivers/clk/ingenic/cgu.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-301-10/+1
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-151-0/+1
* clk: ingenic: Remove set but not used variable 'enable'YueHaibing2019-02-261-2/+1
* clk: ingenic: Fix round_rate misbehaving with non-integer dividersPaul Cercueil2019-02-221-5/+5
* clk: ingenic: Support specifying "wait for clock stable" delayPaul Cercueil2018-06-021-0/+3
* clk: ingenic: Add support for clocks whose gate bit is invertedPaul Cercueil2018-06-021-2/+3
* clk: ingenic: Add code to enable/disable PLLsPaul Cercueil2018-01-181-15/+74
* clk: ingenic: support PLLs with no bypass bitPaul Cercueil2018-01-181-1/+2
* clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil2018-01-181-0/+2
* Update MIPS email addressesPaul Burton2017-11-031-1/+1
* clk: ingenic: Allow divider value to be dividedHarvey Hunt2016-05-121-1/+10
* clk: ingenic: Include clk.hStephen Boyd2015-07-201-0/+1
* clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton2015-06-211-0/+711