linux - linux

	Commit message (Collapse)	Author	Age	Files	Lines
*	clk: mediatek: add mt2701 ethernet reset	John Crispin	2017-04-22	1	-0/+2
\| \| \| \| \| \| \| \|	The ethernet clock core has a reset register that is currently not exposed to the user. Fix this by adding the missing registration code. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
*	clk: mediatek: Add MT2701 clock support	Shunli Wang	2016-11-09	1	-0/+80
	Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>