| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 2019-05-30 | 1 | -9/+1 |
| * | clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel | chunhui dai | 2019-02-25 | 1 | -2/+2 |
| * | clk: mediatek: remove unused array audio_parents | Colin Ian King | 2018-08-31 | 1 | -5/+0 |
| * | clk: mediatek: correct the clocks for MT2701 HDMI PHY module | Ryder Lee | 2018-05-16 | 1 | -2/+6 |
| * | clk: mediatek: fix PWM clock source by adding a fixed-factor clock | Sean Wang | 2018-03-19 | 1 | -7/+8 |
| * | clk: mediatek: mark mtk_infrasys_init_early __init | Arnd Bergmann | 2017-11-02 | 1 | -1/+1 |
| * | clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs | Sean Wang | 2017-06-20 | 1 | -0/+8 |
| * | reset: mediatek: Add MT2701 reset driver | Shunli Wang | 2016-11-09 | 1 | -2/+10 |
| * | clk: mediatek: Add MT2701 clock support | Shunli Wang | 2016-11-09 | 1 | -0/+1027 |
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