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path: root/drivers/clk/mediatek/clk-mtk.h (follow)
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* clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-311-0/+3
* clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-311-0/+10
* clk: mediatek: clk-mtk: Add dummy clock opsAngeloGioacchino Del Regno2023-01-311-0/+19
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-311-1/+2
* clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocksAngeloGioacchino Del Regno2022-11-291-1/+6
* clk: mediatek: Provide mtk_devm_alloc_clk_dataMarkus Schneider-Pargmann2022-10-011-0/+2
* clk: mediatek: clk-apmixed: Add helper function to unregister ref2usb_txAngeloGioacchino Del Regno2022-09-261-0/+1
* clk: mediatek: reset: Add reset support for simple probeRex-BC Chen2022-06-161-0/+1
* clk: mediatek: reset: Add reset.hRex-BC Chen2022-06-161-6/+2
* clk: mediatek: Switch to clk_hw provider APIsChen-Yu Tsai2022-05-201-1/+1
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-201-10/+10
* clk: mediatek: Make mtk_clk_register_composite() staticChen-Yu Tsai2022-05-201-3/+0
* clk: mediatek: mtk: Implement error handling in register APIsChen-Yu Tsai2022-02-171-10/+10
* clk: mediatek: mtk: Clean up included headersChen-Yu Tsai2022-02-171-6/+6
* clk: mediatek: Add mtk_clk_simple_remove()Chen-Yu Tsai2022-02-171-0/+1
* clk: mediatek: Implement mtk_clk_unregister_composites() APIChen-Yu Tsai2022-02-171-0/+2
* clk: mediatek: Implement mtk_clk_unregister_divider_clks() APIChen-Yu Tsai2022-02-171-3/+5
* clk: mediatek: Implement mtk_clk_unregister_factors() APIChen-Yu Tsai2022-02-171-2/+4
* clk: mediatek: Implement mtk_clk_unregister_fixed_clks() APIChen-Yu Tsai2022-02-171-2/+4
* clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai2022-02-171-39/+0
* clk: mediatek: gate: Consolidate gate type clk related codeChen-Yu Tsai2022-02-171-25/+0
* clk: mediatek: Add API for clock resource recycleChun-Jie Chen2021-09-151-0/+1
* clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providersChun-Jie Chen2021-07-271-0/+8
* clk: mediatek: Add configurable enable control to mtk_pll_dataChun-Jie Chen2021-07-271-9/+11
* clk: mediatek: Register clock gate with deviceWeiyi Lu2019-09-171-0/+5
* clk: reset: Modify reset-controller driveryong.liang2019-08-081-0/+3
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
* clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_dataWeiyi Lu2019-04-111-0/+1
* clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_dataOwen Chen2019-04-111-0/+2
*-. Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk...Stephen Boyd2019-03-081-8/+21
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| | * clk: mediatek: Add flags to mtk_gateJasper Mattsson2019-02-261-0/+1
| | * clk: mediatek: Add MUX_FLAGS macroJasper Mattsson2019-02-261-2/+6
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| * clk: mediatek: add MUX_GATE_FLAGS_2chunhui dai2019-02-251-6/+14
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* clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being builtSean Wang2018-01-101-7/+0
* clk: mediatek: Fix all warnings for missing struct clk_onecell_dataSean Wang2017-12-271-0/+1
* clk: mediatek: add the option for determining PLL source clockChen Zhong2017-11-021-0/+1
* clk: mediatek: Add MT2712 clock supportweiyi.lu@mediatek.com2017-11-021-0/+2
* clk: mediatek: Add MT2701 clock supportShunli Wang2016-11-091-5/+36
* clk: mediatek: make dpi0_sel propagate rate changesPhilipp Zabel2016-05-061-2/+13
* clk: mediatek: Add USB clock support in MT8173 APMIXEDSYSJames Liao2015-10-011-0/+3
* clk: mediatek: Add fixed clocks support for Mediatek SoC.James Liao2015-10-011-0/+17
* clk: mediatek: Remove unused code from MT8173.James Liao2015-10-011-2/+2
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-1/+2
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| * clk: mediatek: Properly include clk.hStephen Boyd2015-07-201-1/+2
* | clk: mediatek: Add MT8173 MMPLL change rate supportJames Liao2015-07-281-0/+6
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* clk: mediatek: Add reset controller supportSascha Hauer2015-05-061-0/+10
* clk: mediatek: Add initial common clock support for Mediatek SoCs.James Liao2015-05-061-0/+159
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