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path: root/drivers/clk/mediatek (follow)
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* clk: mediatek: Warn if clk IDs are duplicatedChen-Yu Tsai2022-02-175-6/+34
* clk: mediatek: mt8195: Implement remove functionsChen-Yu Tsai2022-02-175-0/+83
* clk: mediatek: mt8195: Implement error handling in probe functionsChen-Yu Tsai2022-02-175-18/+61
* clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()Chen-Yu Tsai2022-02-1714-0/+14
* clk: mediatek: Unregister clks in mtk_clk_simple_probe() error pathChen-Yu Tsai2022-02-171-1/+3
* clk: mediatek: mtk: Implement error handling in register APIsChen-Yu Tsai2022-02-172-35/+103
* clk: mediatek: pll: Implement error handling in register APIChen-Yu Tsai2022-02-172-7/+22
* clk: mediatek: mux: Implement error handling in register APIChen-Yu Tsai2022-02-171-1/+14
* clk: mediatek: mux: Reverse check for existing clk to reduce nesting levelChen-Yu Tsai2022-02-171-7/+8
* clk: mediatek: gate: Implement error handling in register APIChen-Yu Tsai2022-02-171-1/+14
* clk: mediatek: cpumux: Implement error handling in register APIChen-Yu Tsai2022-02-171-1/+14
* clk: mediatek: mtk: Clean up included headersChen-Yu Tsai2022-02-172-13/+12
* clk: mediatek: Add mtk_clk_simple_remove()Chen-Yu Tsai2022-02-172-0/+16
* clk: mediatek: Implement mtk_clk_unregister_composites() APIChen-Yu Tsai2022-02-172-0/+48
* clk: mediatek: Implement mtk_clk_unregister_divider_clks() APIChen-Yu Tsai2022-02-172-3/+24
* clk: mediatek: Implement mtk_clk_unregister_factors() APIChen-Yu Tsai2022-02-172-2/+24
* clk: mediatek: Implement mtk_clk_unregister_fixed_clks() APIChen-Yu Tsai2022-02-172-2/+24
* clk: mediatek: pll: Clean up included headersChen-Yu Tsai2022-02-171-5/+7
* clk: mediatek: pll: Implement unregister APIChen-Yu Tsai2022-02-172-0/+57
* clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai2022-02-1719-57/+91
* clk: mediatek: mux: Clean up included headersChen-Yu Tsai2022-02-172-5/+14
* clk: mediatek: mux: Internalize struct mtk_clk_muxChen-Yu Tsai2022-02-172-8/+8
* clk: mediatek: mux: Implement unregister APIChen-Yu Tsai2022-02-172-0/+38
* clk: mediatek: cpumux: Clean up included headersChen-Yu Tsai2022-02-172-0/+7
* clk: mediatek: cpumux: Internalize struct mtk_clk_cpumuxChen-Yu Tsai2022-02-172-8/+8
* clk: mediatek: cpumux: Implement unregister APIChen-Yu Tsai2022-02-172-0/+34
* clk: mediatek: gate: Clean up included headersChen-Yu Tsai2022-02-172-11/+10
* clk: mediatek: gate: Implement unregister APIChen-Yu Tsai2022-02-172-0/+38
* clk: mediatek: gate: Internalize clk implementationChen-Yu Tsai2022-02-172-41/+25
* clk: mediatek: gate: Consolidate gate type clk related codeChen-Yu Tsai2022-02-174-77/+77
* clk: mediatek: Use %pe to print errorsChen-Yu Tsai2022-02-176-25/+13
* clk: mediatek: Fix memory leaks on probeJosé Expósito2022-01-251-6/+30
* clk: mediatek: relicense mt7986 clock driver to GPL-2.0Sam Shih2022-01-193-3/+3
* clk: mediatek: add mt7986 clock supportSam Shih2022-01-076-0/+819
* clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpersAngeloGioacchino Del Regno2022-01-071-4/+2
* clk: mediatek: clk-gate: Shrink by adding clockgating bit check helperAngeloGioacchino Del Regno2022-01-071-11/+7
* clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.cRan Jianping2021-11-021-2/+0
* clk: mediatek: Export clk_ops structures to modulesStephen Boyd2021-09-151-0/+2
* clk: mediatek: support COMMON_CLK_MT6779 module buildMiles Chen2021-09-1510-17/+35
* clk: mediatek: support COMMON_CLK_MEDIATEK module buildMiles Chen2021-09-158-1/+33
* clk: mediatek: Add MT8195 apusys clock supportChun-Jie Chen2021-09-152-1/+94
* clk: mediatek: Add MT8195 imp i2c wrapper clock supportChun-Jie Chen2021-09-152-1/+69
* clk: mediatek: Add MT8195 wpesys clock supportChun-Jie Chen2021-09-152-1/+145
* clk: mediatek: Add MT8195 vppsys1 clock supportChun-Jie Chen2021-09-152-1/+109
* clk: mediatek: Add MT8195 vppsys0 clock supportChun-Jie Chen2021-09-152-1/+111
* clk: mediatek: Add MT8195 vencsys clock supportChun-Jie Chen2021-09-152-1/+71
* clk: mediatek: Add MT8195 vdosys1 clock supportChun-Jie Chen2021-09-152-1/+141
* clk: mediatek: Add MT8195 vdosys0 clock supportChun-Jie Chen2021-09-152-1/+124
* clk: mediatek: Add MT8195 vdecsys clock supportChun-Jie Chen2021-09-152-1/+106
* clk: mediatek: Add MT8195 scp adsp clock supportChun-Jie Chen2021-09-152-1/+48
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-13 12:56:31 +0100