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* clk: meson: fix rate calculation of plls with a fractional partJerome Brunet2018-02-123-3/+15
* clk: meson: add the gxl hdmi pllJerome Brunet2018-02-121-2/+48
* clk: meson: add od3 to the pll driverJerome Brunet2018-02-123-3/+23
* clk: meson: use the frac parameter width instead of a constantJerome Brunet2018-02-121-1/+1
* clk: meson: remove unnecessary rounding in the pll clockJerome Brunet2018-02-121-8/+9
* clk: meson: remove useless pll rate params tablesJerome Brunet2018-02-122-188/+0
* clk: meson: check pll rate param table before using itJerome Brunet2018-02-121-0/+10
* clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()weiyongjun (A)2018-01-101-0/+2
* Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...Stephen Boyd2018-01-031-1/+1
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| * clk: meson: mpll: use 64-bit maths in params_from_rateMartin Blumenstingl2017-12-231-1/+1
* | clk: meson-axg: make local symbol axg_gp0_params_table staticweiyongjun (A)2017-12-281-1/+1
* | clk: meson-axg: fix return value check in axg_clkc_probe()weiyongjun (A)2017-12-281-1/+1
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* clk: meson-axg: add clock controller driversQiufang Dai2017-12-144-0/+1071
* clk: meson: make the spinlock naming more specificYixun Lan2017-12-143-69/+69
* clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocksJerome Brunet2017-12-081-13/+3
* clk: meson: gxbb: fix wrong clock for SARADC/SANAYixun Lan2017-11-271-2/+2
* clk: meson: gxbb: Add VPU and VAPB clocks dataNeil Armstrong2017-10-201-0/+292
* clk: meson: gxbb: Add VPU and VAPB clockidsNeil Armstrong2017-10-201-1/+5
* Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...Stephen Boyd2017-08-2410-251/+685
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| * clk: meson: gxbb-aoclk: Add CEC 32k clockNeil Armstrong2017-08-044-2/+231
| * clk: meson: gxbb-aoclk: Switch to regmap for register accessNeil Armstrong2017-08-044-23/+95
| * clk: meson: gxbb: Add sd_emmc clk0 clocksJerome Brunet2017-08-041-0/+177
| * clk: meson: gxbb: fix clk_mclk_i958 divider flagsJerome Brunet2017-08-041-3/+4
| * clk: meson: gxbb: fix meson cts_amclk divider flagsJerome Brunet2017-08-041-1/+2
| * clk: meson: meson8b: register the built-in reset controllerMartin Blumenstingl2017-08-043-13/+156
| * clk: meson: gxbb: Add sd_emmc clk0 clkidsJerome Brunet2017-08-041-2/+8
| * clk: meson-gxbb: expose almost every clock in the bindingsJerome Brunet2017-08-041-110/+7
| * clk: meson8b: expose every clock in the bindingsJerome Brunet2017-08-041-99/+4
| * clk: meson: gxbb: fix protection against undefined clksJerome Brunet2017-08-041-0/+2
| * clk: meson: meson8b: fix protection against undefined clksJerome Brunet2017-08-041-0/+1
* | clk: meson: mpll: fix mpll0 fractional part ignoredJerome Brunet2017-08-014-0/+18
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* Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd2017-06-174-19/+25
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| * clk: meson: gxbb: add all clk81 parentsJerome Brunet2017-06-161-5/+8
| * Merge branch 'next/headers' into next/driversJerome Brunet2017-06-161-10/+10
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| | * clk: meson8b: export the ethernet gate clockMartin Blumenstingl2017-06-121-1/+1
| | * clk: meson8b: export the USB clocksMartin Blumenstingl2017-06-121-5/+5
| | * clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl2017-06-121-1/+1
| | * clk: meson8b: export the SDIO clockMartin Blumenstingl2017-06-121-1/+1
| | * clk: meson8b: export the SAR ADC clocksMartin Blumenstingl2017-06-121-2/+2
| * | clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2017-06-122-4/+7
* | | clk: meson-gxbb: Add const to some parent name arraysStephen Boyd2017-06-021-3/+3
* | | Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into cl...Stephen Boyd2017-06-023-74/+73
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| * | clk: meson-gxbb: Add EE 32K Clock for CECNeil Armstrong2017-05-292-1/+58
| * | clk: gxbb: remove CLK_IGNORE_UNUSED from clk81Jerome Brunet2017-05-291-1/+1
| * | clk: meson: meson8b: mark clk81 as criticalMartin Blumenstingl2017-05-291-1/+1
| * | clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driverMartin Blumenstingl2017-05-292-62/+4
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| * clk: meson-gxbb: un-export the CPU clockMartin Blumenstingl2017-05-291-1/+1
| * clk: meson-gxbb: expose UART clocksHelmut Klein2017-05-291-3/+3
| * clk: meson-gxbb: expose SPICC gateNeil Armstrong2017-05-291-1/+1
| * clk: meson-gxbb: expose spdif master clockJerome Brunet2017-05-291-2/+2