linux - linux

	Commit message (Expand)	Author	Files	Lines
2017-09-01	clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()	Gabriel Fernandez	1	-6/+6
2017-09-01	clk: uniphier: add PXs3 clock data	Masahiro Yamada	4	-0/+46
2017-09-01	clk: hi6220: change watchdog clock source	Leo Yan	1	-3/+3
2017-09-01	clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808	Elaine Zhang	1	-2/+2
2017-08-31	clk: cs2000: Add cs2000_set_saved_rate	Gaku Inami	1	-4/+10
2017-08-31	clk: imx51: propagate rate across ipu_di*_sel	Lucas Stach	1	-4/+4
2017-08-31	clk: sunxi: fix uninitialized access	Arnd Bergmann	1	-0/+4
2017-08-31	clk: versatile: make clk_ops const	Bhumika Goyal	1	-1/+1
2017-08-31	ARC: clk: introduce HSDK pll driver	Eugeniy Paltsev	5	-0/+473
2017-08-31	clk: zte: constify clk_div_table	Arvind Yadav	1	-3/+3
2017-08-31	clk: imx: constify clk_div_table	Arvind Yadav	5	-12/+12
2017-08-31	clk: uniphier: add ethernet clock control support	Kunihiko Hayashi	1	-0/+10
2017-08-31	clk: gemini: hands off PCI OE bit	Linus Walleij	1	-7/+0
2017-08-31	clk: ux500: prcc: constify clk_ops.	Arvind Yadav	1	-3/+3
2017-08-31	clk: ux500: sysctrl: constify clk_ops.	Arvind Yadav	1	-4/+4
2017-08-31	clk: ux500: prcmu: constify clk_ops.	Arvind Yadav	1	-7/+7
2017-08-24	clk: sunxi-ng: Add sun4i/sun7i CCU driver	Priit Laes	7	-0/+1853
2017-08-24	dt-bindings: List devicetree binding for the CCU of Allwinner A10	Priit Laes	1	-0/+1
2017-08-24	dt-bindings: List devicetree binding for the CCU of Allwinner A20	Priit Laes	1	-0/+1
2017-08-24	clk: msm8996-gcc: add missing smmu clks	Srinivas Kandagatla	2	-0/+30
2017-08-24	clk: tegra: Fix Tegra210 PLLU initialization	Alex Frid	1	-2/+4
2017-08-24	clk: tegra: Correct Tegra210 UTMIPLL poweron delay	Alex Frid	1	-3/+3
2017-08-24	clk: tegra: Fix T210 PLLRE registration	Alex Frid	1	-20/+1
2017-08-24	clk: tegra: Update T210 PLLSS (D2/DP) registration	Alex Frid	1	-39/+9
2017-08-24	clk: tegra: Re-factor T210 PLLX registration	Alex Frid	4	-49/+10
2017-08-24	clk: tegra: don't warn for pll_d2 defaults unnecessarily	Peter De Schrijver	1	-2/+4
2017-08-24	clk: tegra: change post IDDQ release delay to 5us	Peter De Schrijver	1	-1/+1
2017-08-24	clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C	Alex Frid	1	-1/+2
2017-08-24	clk: tegra: Fix T210 effective NDIV calculation	Alex Frid	1	-4/+5
2017-08-24	clk: tegra: Init cfg structure in _get_pll_mnp	Peter De Schrijver	1	-0/+2
2017-08-24	clk: tegra210: remove non-existing VFIR clock	Peter De Schrijver	1	-1/+0
2017-08-24	clk: tegra: disable SSC for PLL_D2	Peter De Schrijver	1	-1/+1
2017-08-24	clk: tegra: Enable PLL_SS for Tegra210	Peter De Schrijver	1	-1/+1
2017-08-24	clk: tegra: fix SS control on PLL enable/disable	Peter De Schrijver	1	-20/+24
2017-08-24	clk: qcom: msm8916: Fix bimc gpu clock ops	Georgi Djakov	1	-1/+1
2017-08-24	clk: ti: make clk_ops const	Bhumika Goyal	3	-4/+4
2017-08-24	clk: rockchip: Mark rockchip_fractional_approximation static	Stephen Boyd	1	-1/+1
2017-08-22	clk: rockchip: fix the rv1108 clk_mac sel register description	Elaine Zhang	1	-1/+1
2017-08-22	clk: rockchip: rename rv1108 macphy clock to mac	Elaine Zhang	2	-9/+9
2017-08-22	clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks	Elaine Zhang	1	-0/+2
2017-08-22	clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id	Elaine Zhang	1	-1/+1
2017-08-22	clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID	Elaine Zhang	1	-0/+2
2017-08-22	clk: rockchip: add rk3228 sclk_sdio_src ID	Elaine Zhang	1	-0/+1
2017-08-19	clk: sunxi-ng: support R40 SoC	Icenowy Zheng	6	-0/+1682
2017-08-19	dt-bindings: add compatible string for Allwinner R40 CCU	Icenowy Zheng	1	-0/+1
2017-08-17	clk: renesas: r8a7796: Add USB3.0 clock	Hiromitsu Yamasaki	1	-0/+1
2017-08-17	clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY	Yoshihiro Shimoda	4	-0/+249
2017-08-16	clk: renesas: cpg-mssr: Add R8A77995 support	Geert Uytterhoeven	6	-1/+251
2017-08-16	clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks	Geert Uytterhoeven	2	-1/+26
2017-08-16	clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3	Geert Uytterhoeven	4	-37/+41