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path: root/drivers/clk/mmp (follow)
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* clk: pxa910: Move number of clocks to driver sourceDuje Mihanović2023-08-221-1/+3
* clk: pxa1928: Move number of clocks to driver sourceDuje Mihanović2023-08-221-2/+5
* clk: pxa168: Move number of clocks to driver sourceDuje Mihanović2023-08-221-1/+3
* clk: mmp2: Move number of clocks to driver sourceDuje Mihanović2023-08-222-3/+7
* clk: mmp: Remove old non-OF clock driversDuje Mihanović2023-08-224-1137/+0
* clk: mmp: Convert to platform remove callback returning voidUwe Kleine-König2023-03-291-4/+2
* clk: mmp: pxa168: control shared SDH bits with separate clockDoug Brown2022-09-301-4/+7
* clk: mmp: pxa168: add clocks for SDH2 and SDH3Doug Brown2022-09-301-0/+6
* clk: mmp: pxa168: fix GPIO clock enable bitsDoug Brown2022-09-301-1/+1
* clk: mmp: pxa168: add muxes for more peripheralsDoug Brown2022-09-301-10/+32
* clk: mmp: pxa168: fix incorrect parent clocksDoug Brown2022-09-301-6/+6
* clk: mmp: pxa168: fix const-correctnessDoug Brown2022-09-301-7/+7
* clk: mmp: pxa168: add new clocks for peripheralsDoug Brown2022-09-301-0/+3
* clk: mmp: pxa168: fix incorrect dividersDoug Brown2022-09-301-2/+2
* clk: mmp: pxa168: add additional register definesDoug Brown2022-09-301-7/+24
* treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (pa...Thomas Gleixner2022-06-1012-48/+12
*-. Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' in...Stephen Boyd2022-03-291-1/+1
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| | * clk: cleanup commentsTom Rix2022-03-121-1/+1
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* / clk: mmp: Declare mux tables as const u32[]Jonathan Neuschäfer2022-02-261-2/+2
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* clk: mmp2: fix build without CONFIG_PMArnd Bergmann2021-01-121-2/+4
*-. Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ...Stephen Boyd2020-10-201-2/+2
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| | * clk: mmp2: Fix the display clock divider baseLubomir Rintel2020-10-141-2/+2
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* / clk: mmp: pxa1928: drop unused 'clk' variableKrzysztof Kozlowski2020-09-221-2/+1
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* clk: mmp: avoid missing prototype warningArnd Bergmann2020-07-292-0/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-06-106-15/+688
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| * clk: mmp2: Add audio clock controller driverLubomir Rintel2020-05-282-0/+444
| * clk: mmp2: Add support for power islandsLubomir Rintel2020-05-284-1/+168
| * clk: mmp2: Add the audio clockLubomir Rintel2020-05-281-0/+4
| * clk: mmp2: Add the I2S clocksLubomir Rintel2020-05-281-0/+46
| * clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()Lubomir Rintel2020-05-281-2/+2
| * clk: mmp2: Move thermal register defines up a bitLubomir Rintel2020-05-281-4/+4
| * clk: mmp: frac: Allow setting bits other than the numerator/denominatorLubomir Rintel2020-05-282-0/+4
| * clk: mmp: frac: Do not lose last 4 digits of precisionLubomir Rintel2020-05-281-8/+16
* | clk: mmp2: fix link error without mmp2Arnd Bergmann2020-04-133-39/+32
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* clk: mmp2: Fix bit masks for LCDC I/O and pixel clocksLubomir Rintel2020-03-211-2/+2
* clk: mmp2: Add clock for fifth SD HCI on MMP3Lubomir Rintel2020-03-211-0/+2
* clk: mmp2: Add clocks for the thermal sensorsLubomir Rintel2020-03-211-0/+16
* clk: mmp2: add the GPU clocksLubomir Rintel2020-03-211-0/+61
* clk: mmp2: Add PLLs that are available on MMP3Lubomir Rintel2020-03-211-7/+27
* clk: mmp2: Check for MMP3Lubomir Rintel2020-03-211-0/+12
* clk: mmp2: Stop pretending PLL outputs are constantLubomir Rintel2020-03-211-2/+14
* clk: mmp2: Add support for PLL clock sourcesLubomir Rintel2020-03-214-1/+195
* clk: mmp2: Constify some stringsLubomir Rintel2020-03-213-9/+10
* clk: mmp2: Remove a unused prototypeLubomir Rintel2020-03-211-3/+0
* Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-02-081-0/+6
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| * clk: mmp2: Add HSIC clocksLubomir Rintel2020-01-061-0/+6
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-02-032-2/+6
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| * | clk: let init callback return an error codeJerome Brunet2019-12-242-2/+6
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* / clk: mmp2: Fix the order of timer mux parentsLubomir Rintel2020-01-061-1/+1
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* ARM: mmp: add support for MMP3 SoCLubomir Rintel2019-10-171-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 11:35:33 +0100