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path: root/drivers/clk/mvebu/armada-xp.c (follow)
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* clk: armada-xp: fix refcount leak in axp_clk_init()Yangtao Li2018-12-281-1/+3
| | | | | | | | | | | The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> Fixes: 0a11a6ae9437 ("clk: mvebu: armada-xp: maintain clock init order") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: mvebu: use SPDX-License-IdentifierGregory CLEMENT2018-10-021-3/+1
| | | | | | | Convert the remaining files to SPDX license description. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: mvebu: Expand mv98dx3236-core-clock supportChris Packham2017-02-101-13/+0
| | | | | | | | | | The initial implementation in commit e120c17a70e5 ("clk: mvebu: support for 98DX3236 SoC") hardcoded a fixed value for the main PLL frequency. Port code from the Marvell supplied Linux kernel to support different PLL frequencies and provide clock gating support. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: mvebu: support for 98DX3236 SoCChris Packham2017-01-271-0/+39
| | | | | | | | | | | | | The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz. The clock gating options are a subset of those on the Armada XP. The core clock divider is different to the Armada XP also. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: mvebu: armada-xp: maintain clock init orderSebastian Hesselbarth2014-02-061-11/+9
| | | | | | | | | | | | | Init order of CLK_OF_DECLARE'd drivers depends on compile order. Unfortunately, clk_of_init does not allow drivers to return errors, e.g. -EPROBE_DEFER if parent clocks have not been registered, yet. To avoid init order woes for MVEBU clock drivers, we take care of proper init order ourselves. This patch joins core-clk and gating-clk init to maintain proper init order. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* clk: armada-xp: Fix incorrect placement of __initconstSachin Kamat2013-08-281-6/+6
| | | | | | | | | __initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: mvebu: add Armada XP SoC-centric clock initSebastian Hesselbarth2013-05-291-0/+210
This is moving core clock and clock gating init for Armada XP to its own file and adds a Kconfig option. Also init functions are added and declared so they get called on of_clk_init. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>