linux - linux

	Commit message (Expand)	Author	Age	Files	Lines
*	clk: renesas: r8a779f0: Fix Ethernet Switch clocks	Geert Uytterhoeven	2022-11-16	1	-2/+2
*	clk: renesas: r8a779f0: Fix SCIF parent clocks	Wolfram Sang	2022-11-08	1	-4/+4
*	clk: renesas: r8a779f0: Fix HSCIF parent clocks	Wolfram Sang	2022-11-08	1	-4/+4
*	clk: renesas: r8a779f0: Add SASYNCPER internal clock	Geert Uytterhoeven	2022-10-26	1	-3/+5
*	clk: renesas: r8a779f0: Fix SD0H clock name	Geert Uytterhoeven	2022-10-26	1	-1/+1
*	clk: renesas: r8a779f0: Add Ethernet Switch clocks	Yoshihiro Shimoda	2022-10-17	1	-0/+2
*	clk: renesas: r8a779f0: Add MSIOF clocks	Wolfram Sang	2022-08-29	1	-0/+4
*	clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks	Wolfram Sang	2022-08-22	1	-0/+10
*	clk: renesas: r8a779f0: Add CMT clocks	Wolfram Sang	2022-08-15	1	-0/+4
*	clk: renesas: r8a779f0: Add SDH0 clock	Wolfram Sang	2022-08-15	1	-1/+2
*	clk: renesas: r8a779f0: Add HSCIF clocks	Wolfram Sang	2022-06-17	1	-0/+4
*	clk: renesas: r8a779f0: Add PCIe clocks	Yoshihiro Shimoda	2022-06-17	1	-0/+2
*	clk: renesas: r8a779f0: Add Z0 and Z1 clock support	Geert Uytterhoeven	2022-06-17	1	-0/+2
*	clk: renesas: r8a779f0: Add SDHI0 clock	Wolfram Sang	2022-06-13	1	-0/+1
*	clk: renesas: r8a779f0: Add thermal clock	Wolfram Sang	2022-06-13	1	-0/+1
*	clk: renesas: rcar-gen4: Add CLK_TYPE_GEN4_PLL4	Yoshihiro Shimoda	2022-04-29	1	-10/+10
*	clk: renesas: r8a779f0: Add UFS clock	Yoshihiro Shimoda	2022-04-25	1	-0/+1
*	clk: renesas: Move RPC core clocks	Geert Uytterhoeven	2022-04-13	1	-3/+6
*	clk: renesas: r8a779f0: Add PFC clock	Geert Uytterhoeven	2022-02-22	1	-0/+1
*	clk: renesas: r8a779f0: Add I2C clocks	Geert Uytterhoeven	2022-02-22	1	-0/+6
*	clk: renesas: r8a779f0: Add WDT clock	Geert Uytterhoeven	2022-02-22	1	-0/+9
*	clk: renesas: r8a779f0: Fix RSW2 clock divider	Geert Uytterhoeven	2022-02-22	1	-1/+1
*	clk: renesas: r8a779f0: Add SYS-DMAC clocks	Yoshihiro Shimoda	2022-01-24	1	-0/+2
*	clk: renesas: cpg-mssr: Add support for R-Car S4-8	Yoshihiro Shimoda	2021-12-08	1	-0/+183