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clk
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rockchip
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Author
Age
Files
Lines
*
clk: rockchip: add clock controller for px30
Elaine Zhang
2018-07-06
1
-0
/
+1
*
clk: rockchip: add support for half divider
Elaine Zhang
2018-07-06
1
-0
/
+1
*
clk: rockchip: remove deprecated gate-clk code and dt-binding
Heiko Stuebner
2018-05-23
1
-1
/
+0
*
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
2017-11-02
1
-0
/
+1
*
clk: rockchip: add clock controller for rk3128
Elaine Zhang
2017-06-02
1
-0
/
+1
*
clk: rockchip: rename RK1108 to RV1108
Andy Yan
2017-03-22
1
-1
/
+1
*
clk: rockchip: add clock controller for rk3328
Elaine Zhang
2017-01-05
1
-0
/
+1
*
clk: rockchip: add a clock-type for muxes based in the grf
Heiko Stuebner
2017-01-02
1
-0
/
+1
*
clk: rockchip: add clock controller for rk1108
Shawn Lin
2016-11-16
1
-0
/
+1
*
clk: rockchip: add new clock-type for the ddrclk
Lin Huang
2016-09-01
1
-0
/
+1
*
clk: rockchip: add clock controller for the RK3399
Xing Zheng
2016-03-28
1
-0
/
+1
*
clk: rockchip: add clock controller for rk3228
Jeffy Chen
2015-12-12
1
-0
/
+1
*
clk: rockchip: add clock controller for rk3036
Xing Zheng
2015-11-23
1
-0
/
+1
*
clk: rockchip: add rk3368 clock controller
Heiko Stuebner
2015-07-07
1
-0
/
+1
*
clk: rockchip: add support for phase inverters
Heiko Stuebner
2015-07-07
1
-0
/
+1
*
clk: rockchip: Add support for the mmc clock phases using the framework
Alexandru M Stan
2014-11-28
1
-0
/
+1
*
clk: rockchip: add new clock-type for the cpuclk
Heiko Stuebner
2014-09-27
1
-0
/
+1
*
clk: rockchip: add clock controller for rk3288
Heiko Stübner
2014-07-13
1
-0
/
+1
*
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
Heiko Stübner
2014-07-13
1
-0
/
+2
*
clk: rockchip: add reset controller
Heiko Stübner
2014-07-13
1
-0
/
+1
*
clk: rockchip: add clock type for pll clocks and pll used on rk3066
Heiko Stübner
2014-07-13
1
-0
/
+1
*
clk: rockchip: add basic infrastructure for clock branches
Heiko Stübner
2014-07-13
1
-0
/
+1
*
clk: add support for Rockchip gate clocks
Heiko Stübner
2013-06-21
1
-0
/
+5