summaryrefslogtreecommitdiffstats
path: root/drivers/clk/rockchip/clk-rk3036.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: Make uartpll a child of the gpll on rk3036Heiko Stuebner2017-03-071-0/+7
* clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036Heiko Stuebner2017-03-071-1/+1
* clk: rockchip: release io resource when failing to init clkShawn Lin2016-03-271-0/+1
* clk: rockchip: Add support for multiple clock providersXing Zheng2016-03-271-5/+12
* clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng2016-03-271-0/+3
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2016-03-231-26/+7
|\
| * Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Michael Turquette2016-02-151-26/+7
| |\
| | * clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner2016-02-041-25/+6
| | * clk: rockchip: fix parent of hclk_vcodec on rk3036Heiko Stuebner2016-02-041-1/+1
| | * clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_busYakir Yang2016-01-241-1/+1
* | | clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036Heiko Stuebner2016-03-171-1/+1
* | | clk: rockchip: associate the rk3036 HCLK_EMAC clock-idXing Zheng2016-03-171-1/+1
|/ /
* | clk: rockchip: rk3036: rename emac ext source clockXing Zheng2016-01-161-1/+1
* | clk: rockchip: rk3036: fix the div offset for emac clockXing Zheng2016-01-161-2/+2
* | clk: rockchip: rk3036: fix uarts clock errorXing Zheng2016-01-161-4/+4
* | clk: rockchip: rk3036: fix the FLAGs for clock muxXing Zheng2016-01-161-6/+6
|/
* Merge branch 'clk-rockchip' into clk-nextMichael Turquette2016-01-021-10/+25
|\
| * clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner2016-01-021-10/+25
* | Merge branch 'clk-rockchip' into clk-nextMichael Turquette2015-12-231-17/+17
|\|
| * clk: rockchip: rk3036: include downstream muxes into fractional dividersXing Zheng2015-12-231-17/+17
* | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner2015-12-211-1/+1
* | clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vioYakir Yang2015-12-161-1/+1
|/
* clk: rockchip: add clock controller for rk3036Xing Zheng2015-11-231-0/+478