| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: rockchip: fix rk3568 cpll clk gate bits | Peter Geis | 2021-05-24 | 1 | -5/+5 |
| * | clk: rockchip: add clock controller for rk3568 | Elaine Zhang | 2021-03-21 | 1 | -0/+1725 |
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