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path: root/drivers/clk/rockchip/clk.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: add clock controller for the RK3588Elaine Zhang2022-11-151-1/+48
* clk: rockchip: add lookup table supportSebastian Reichel2022-11-141-6/+15
* clk: rockchip: simplify rockchip_clk_add_lookupSebastian Reichel2022-11-141-2/+0
* clk: rockchip: allow additional mux options for cpu-clock frequency changesElaine Zhang2022-11-141-0/+2
* clk: rockchip: add pll type for RK3588Elaine Zhang2022-11-141-0/+18
* clk: rockchip: add register offset of the cores select parentElaine Zhang2022-11-141-0/+3
* clk: rockchip: Add clock controller support for RV1126 SoCJagan Teki2022-09-231-0/+19
* clk: rockchip: Add MUXTBL variantElaine Zhang2022-09-131-0/+17
* clk: rockchip: Optimize PLL table memory usageElaine Zhang2021-05-111-11/+18
* clk: rockchip: add clock controller for rk3568Elaine Zhang2021-03-211-1/+29
* clk: rockchip: support more core div settingElaine Zhang2021-03-211-11/+13
* clk: rockchip: Add clock controller for the rk3308Finley Xiao2019-09-051-0/+13
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-171-0/+4
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| * clk: rockchip: add a type from SGRF-controlled gate clocksHeiko Stuebner2019-06-141-0/+4
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-301-10/+1
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* clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-typeFinley Xiao2019-04-121-0/+23
* clk: rockchip: add clock controller for px30Elaine Zhang2018-07-061-1/+40
* clk: rockchip: add support for half dividerElaine Zhang2018-07-061-0/+85
* clk: rockchip: rename RK1108 to RV1108Andy Yan2017-03-221-14/+14
* clk: rockchip: add clock controller for rk3328Elaine Zhang2017-01-051-0/+18
* clk: rockchip: add new pll-type for rk3328Elaine Zhang2017-01-021-0/+1
* clk: rockchip: add a clock-type for muxes based in the grfHeiko Stuebner2017-01-021-0/+21
* clk: rockchip: add clock controller for rk1108Shawn Lin2016-11-161-0/+15
* clk: rockchip: add new clock-type for the ddrclkLin Huang2016-09-011-0/+33
* clk: rockchip: use general clock flag when registering pllHeiko Stübner2016-08-081-1/+1
* clk: rockchip: simplify GRF handling in pll clocksHeiko Stuebner2016-05-091-1/+0
* clk: rockchip: fix checkpatch warning in core codeHeiko Stuebner2016-04-201-1/+1
* clk: rockchip: drop unnecessary header commentHeiko Stuebner2016-04-191-1/+0
* clk: rockchip: add clock controller for the RK3399Xing Zheng2016-03-281-1/+21
* clk: rockchip: fix warning reported by kernel-docShawn Lin2016-03-271-4/+5
* clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_dataShawn Lin2016-03-271-1/+0
* clk: rockchip: add new pll-type for rk3399 and similar socsXing Zheng2016-03-271-1/+2
* clk: rockchip: Add support for multiple clock providersXing Zheng2016-03-271-13/+38
* clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng2016-03-271-0/+6
* clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE typeXing Zheng2016-03-271-0/+16
* clk: rockchip: add a factor clock typeHeiko Stuebner2016-02-041-0/+28
* Merge branch 'clk-rockchip' into clk-nextMichael Turquette2016-01-021-1/+1
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| * clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner2016-01-021-1/+1
* | Merge branch 'clk-rockchip' into clk-nextMichael Turquette2015-12-231-0/+19
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| * clk: rockchip: handle mux dependency of fractional dividersHeiko Stuebner2015-12-231-0/+19
* | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner2015-12-211-1/+1
* | clk: rockchip: add clock controller for rk3228Jeffy Chen2015-12-121-1/+10
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* clk: rockchip: add clock controller for rk3036Xing Zheng2015-11-231-1/+8
* clk: rockchip: add new pll-type for rk3036 and similar socsXing Zheng2015-11-231-0/+23
* clk: rockchip: Fix PLL bandwidthDouglas Anderson2015-07-281-4/+4
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-2/+2
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| * clk: rockchip: Properly include clk.hStephen Boyd2015-07-201-2/+2
* | clk: rockchip: add rk3368 clock controllerHeiko Stuebner2015-07-071-0/+16
* | clk: rockchip: add support for phase invertersHeiko Stuebner2015-07-071-0/+20
* | clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variantHeiko Stuebner2015-07-071-0/+20
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-14 23:25:29 +0100