summaryrefslogtreecommitdiffstats
path: root/drivers/clk/rockchip (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: rename RK1108 to RV1108Andy Yan2017-03-223-222/+222
* clk: rockchip: mark some rk3368 core-clks as criticalElaine Zhang2017-03-101-0/+3
* clk: rockchip: export SCLK_TIMERXX id for timers on rk3368Elaine Zhang2017-03-101-12/+12
* clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328Elaine Zhang2017-03-101-0/+9
* clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399Douglas Anderson2017-03-061-4/+4
* clk: rockchip: rk3288: make all niu clocks criticalJacob Chen2017-01-231-7/+14
* clk: rockchip: use rk3288 vip_out clock idsJacob Chen2017-01-221-1/+1
* clk: rockchip: fix the incorrect pclk_edp div width for RK3399Xing Zheng2017-01-181-1/+1
* clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188Heiko Stuebner2017-01-131-2/+2
* clk: rockchip: use rk3288 isp_in clock idsJacob Chen2017-01-131-1/+1
* clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFERDouglas Anderson2017-01-061-1/+0
* clk: rockchip: add clock controller for rk3328Elaine Zhang2017-01-053-0/+914
* clk: rockchip: add new pll-type for rk3328Elaine Zhang2017-01-022-3/+14
* clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288Heiko Stuebner2017-01-021-6/+5
* clk: rockchip: add a clock-type for muxes based in the grfHeiko Stuebner2017-01-024-0/+131
* Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2016-12-075-2/+558
|\
| * clk: rockchip: add clock controller for rk1108Shawn Lin2016-11-163-0/+547
| * clk: rockchip: fix copy-paste error in rk3399 testclkJianqun Xu2016-11-161-2/+2
| * clk: rockchip: validity should be checked prior to cpu clock rate changeElaine Zhang2016-11-141-0/+9
* | Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2016-11-153-21/+25
|\|
| * clk: rockchip: Ignore frac divisor for PLL equivalence when it's unusedJulius Werner2016-11-051-2/+4
| * clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktreeJianqun Xu2016-11-051-11/+11
| * clk: rockchip: add 400MHz to rk3066 clock rates tablePaweł Jarosz2016-11-051-0/+1
| * clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399Xing Zheng2016-11-021-2/+2
| * clk: rockchip: Use clock ids for cpu and peri clocks on rk3066Paweł Jarosz2016-10-211-6/+6
| * clk: rockchip: add 533.25MHz to rk3399 clock rates tableXing Zheng2016-10-211-0/+1
* | clk: rockchip: don't return NULL when failing to register ddrclk branchShawn Lin2016-10-161-4/+1
|/
* Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-09-077-20/+248
|\
| * clk: rockchip: use the dclk_vop_frac clock ids on rk3399Yakir Yang2016-09-041-2/+2
| * clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividersDouglas Anderson2016-09-041-13/+13
| * clk: rockchip: add 2016M to big cpu clk rate table on rk3399Shunqian Zheng2016-09-041-0/+1
| * clk: rockchip: add rk3399 ddr clock supportLin Huang2016-09-041-0/+19
| * clk: rockchip: add new clock-type for the ddrclkLin Huang2016-09-014-0/+197
| * clk: rockchip: handle of_iomap failures in legacy clock driverArvind Yadav2016-08-231-1/+6
| * clk: rockchip: mark rk3399 hdcp_noc and vio_noc as criticalChris Zhong2016-08-121-0/+4
| * clk: rockchip: use general clock flag when registering pllHeiko Stübner2016-08-083-4/+4
| * clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399Elaine Zhang2016-08-081-2/+2
| * clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMIXing Zheng2016-08-081-0/+2
* | clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399Xing Zheng2016-08-241-0/+1
* | clk: rockchip: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src on rk3399Xing Zheng2016-08-121-2/+2
* | clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399Xing Zheng2016-08-121-2/+2
* | clk: rockchip: fix rk3399 aclk_vio gate bitChris Zhong2016-08-111-1/+1
|/
* Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-07-022-52/+84
|\
| * clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bitsXing Zheng2016-07-011-1/+1
| * clk: rockchip: export rk3228 MAC clocksXing Zheng2016-07-011-11/+11
| * clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclkXing Zheng2016-07-011-3/+3
| * clk: rockchip: export rk3228 audio clocksXing Zheng2016-07-011-4/+4
| * clk: rockchip: include rk3228 downstream muxes into fractional dividersXing Zheng2016-07-011-29/+52
| * clk: rockchip: fix incorrect rk3228 clock registersXing Zheng2016-06-221-9/+9
| * clk: rockchip: add a dummy clock for the watchdog pclk on rk3399Xing Zheng2016-05-301-0/+9
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 17:21:16 +0100