summaryrefslogtreecommitdiffstats
path: root/drivers/clk/rockchip (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399Xing Zheng2016-08-241-0/+1
* clk: rockchip: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src on rk3399Xing Zheng2016-08-121-2/+2
* clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399Xing Zheng2016-08-121-2/+2
* clk: rockchip: fix rk3399 aclk_vio gate bitChris Zhong2016-08-111-1/+1
* Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-07-022-52/+84
|\
| * clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bitsXing Zheng2016-07-011-1/+1
| * clk: rockchip: export rk3228 MAC clocksXing Zheng2016-07-011-11/+11
| * clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclkXing Zheng2016-07-011-3/+3
| * clk: rockchip: export rk3228 audio clocksXing Zheng2016-07-011-4/+4
| * clk: rockchip: include rk3228 downstream muxes into fractional dividersXing Zheng2016-07-011-29/+52
| * clk: rockchip: fix incorrect rk3228 clock registersXing Zheng2016-06-221-9/+9
| * clk: rockchip: add a dummy clock for the watchdog pclk on rk3399Xing Zheng2016-05-301-0/+9
* | clk: rockchip: release io resource when failing to init clk on rk3399Shawn Lin2016-06-031-0/+2
* | clk: rockchip: fix cpuclk registration error handlingXing Zheng2016-05-301-2/+2
* | clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initia...Douglas Anderson2016-05-301-11/+0
* | clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_srcXing Zheng2016-05-301-2/+2
* | clk: rockchip: mark rk3399 GIC clocks as criticalBrian Norris2016-05-301-0/+2
* | clk: rockchip: initialize flags of clk_init_data in mmc-phase clockHeiko Stuebner2016-05-301-0/+1
|/
* Merge tag 'v4.7-rockchip-clk4' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-05-124-47/+14
|\
| * clk: rockchip: drop old_rate calculation on pll rate changesHeiko Stuebner2016-05-091-9/+6
| * clk: rockchip: simplify GRF handling in pll clocksHeiko Stuebner2016-05-093-33/+3
| * clk: rockchip: lookup General Register Files in rockchip_clk_initHeiko Stuebner2016-05-091-3/+3
| * clk: rockchip: fix the rk3399 sdmmc sample / drv nameDouglas Anderson2016-05-081-2/+2
* | Merge tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-05-032-169/+179
|\|
| * clk: rockchip: fix the rk3399 cifout clockXing Zheng2016-04-251-5/+6
| * clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399Xing Zheng2016-04-251-157/+157
| * clk: rockchip: add some frequencies on the rk3399 PLL tableXing Zheng2016-04-251-1/+10
| * clk: rockchip: assign more necessary rk3399 clock idsXing Zheng2016-04-251-6/+6
| * clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399Xing Zheng2016-04-251-2/+2
| * clk: rockchip: fix of spelling mistake on unsuccessful in pll clock typeColin Ian King2016-04-251-2/+2
* | Merge tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-04-204-81/+108
|\|
| * clk: rockchip: fix checkpatch warning in core codeHeiko Stuebner2016-04-203-22/+27
| * clk: rockchip: drop unnecessary header commentHeiko Stuebner2016-04-191-1/+0
| * clk: rockchip: reign in some overly long lines in the rk3399 controllerHeiko Stuebner2016-04-191-58/+81
* | Merge tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-04-1611-136/+2131
|\|
| * clk: rockchip: add clock controller for the RK3399Xing Zheng2016-03-283-1/+1562
| * clk: rockchip: release io resource when failing to init clkShawn Lin2016-03-275-0/+5
| * clk: rockchip: remove redundant checking of device_nodeShawn Lin2016-03-271-5/+3
| * clk: rockchip: fix warning reported by kernel-docShawn Lin2016-03-271-4/+5
| * clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_dataShawn Lin2016-03-271-1/+0
| * clk: rockchip: add new pll-type for rk3399 and similar socsXing Zheng2016-03-272-2/+272
| * clk: rockchip: Add support for multiple clock providersXing Zheng2016-03-278-118/+229
| * clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng2016-03-277-11/+45
| * clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE typeXing Zheng2016-03-271-0/+16
* | clk: rockchip: Make reset_control_ops constPhilipp Zabel2016-03-301-1/+1
|/
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2016-03-2311-212/+238
|\
| * Merge tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2016-03-046-61/+83
| |\
| | * clk: rockchip: include downstream muxes into fractional dividers on rk3368Elaine Zhang2016-02-261-37/+60
| | * clk: rockchip: set the clock ids for RK3228 HDMIYakir Yang2016-02-261-4/+4
| | * clk: rockchip: set the clock ids for RK3228 VOPYakir Yang2016-02-261-3/+3
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 06:56:51 +0100