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* Merge tag 'armsoc-dt' of ↵Linus Torvalds2017-02-241-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "A total of 380 patches this time, mostly adding support for more hardware in the device tree descriptions. There is not much exciting here for 4.11, but I've tried my best to condense the information from the pull requests I got into a readable summary. Noteworthy changes to existing platforms include: - The GIC memory map was a bit wrong almost everywhere and now gets fixed up - The Allwinner platforms convert to the generic pinmux properties - The Marvell EBU platforms now use the new DSA binding - Samsung Exynos4212 was unused and gets removed - The Renesas power management got improved New production machines: - Lego Mindstorms EV3: https://www.lego.com/en-us/mindstorms/about-ev3 - Beelink X2 Android media box: http://linux-sunxi.org/Beelink_X2 - "Romulus" baseboard management controller for OpenPower - Axentia TSE-850 Data Radio Channel (DARC) encoder: http://www.axentia.se/db/equipment.html - Luxul XAP-1410 and XWR-1200 wireless access points: https://luxul.com/xap-1410 New SoCs: - Allwinner H2+ and V3s, both minor variations of already supported chips: http://www.allwinnertech.com/index.php?c=product&a=index&id=38 - Marvell Prestera DX packet processors based on Armada XP architecture: http://www.marvell.com/switching/prestera-dx/ - Samsung Exynos4412 Prime gets added, a minor variation of Exynos4412 New developer and reference boards: - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on Allwinner SoCs: http://linux-sunxi.org/LicheePi_One http://www.orangepi.org/orangepizero/ - SAMA5d36ek Reference platform: http://www.atmel.com/tools/sama5d36-ek.aspx - Beaglebone Green Wireless and Black Wireless: https://beagleboard.org/black-wireless https://beagleboard.org/green-wireless - phyCORE-AM335x System on Module: http://phytec.com/products/system-on-modules/phycore/am335x/ - New revision of "vf610-zii" Zodiac Inflight Innovations board - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam i.Core: http://www.opossom.com/english/index.html http://www.savageboard.org/ http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is - Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas, qcom, rockchip, sti, stm32 and tegra New device supports added to some boards and SoCs, briefly by platform: - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU - Aspeed: network, ipmi bt, gpio, pinmux - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc - TI DaVinci: gpio, lcdc, usb, video-in, uart - TI Keystone 2: MSM RAM, power/reset, uart - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal - Marvell EBU: ethernet switch on Turris Omnia - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom, mmc, nand - TI OMAP: - Qualcomm: coresight, gyro/accelerometer, hdmi - Renesas: pmic, soc-id - Rockchip: qos - Samsung: audio on Odroid-X - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor - STi: video in/out - STM32: timer, pwm, i2c, rtc, add, i2s - NVIDIA Tegra: tpm - Uniphier: mmc/sd pinmux" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits) ARM: dts: armada-385-linksys: fix DSA compatible property ARM: dts: Fix typo in armada-xp-98dx4251 ARM: DTS: Fix register map for virt-capable GIC dt-bindings: arm,gic: Fix binding example for a virt-capable GIC ARM: dts: sun8i: sinlinx: Enable audio nodes ARM: dts: sun8i: parrot: Enable audio nodes ARM: dts: sun8i: Add audio codec, dai and card for A33 ARM: dts: Add EMAC AXI settings for Arria10 ARM: dts: am335x-chiliboard: Support charger ARM: dts: am335x-chiliboard: Support power button ARM: sun8i: dt: Add mali node dt-bindings: gpu: Add Mali Utgard bindings ARM: dts: stm32: Add I2C1 support for STM32429 eval board ARM: dts: stm32: Add I2C1 support for STM32F429 SoC ARM: dts: stm32: Use clock DT binding definition on stm32f429 family dt-bindings: mfd: stm32f4: Add missing binding definition dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco ARM: dts: stm32: add Timers driver for stm32f429 MCU ARM: dts: add the AB8500 sysclk to the device trees ...
| * clk: samsung: Add CPU clk configuration data for Exynos4412 PrimeBartlomiej Zolnierkiewicz2016-12-291-0/+4
| | | | | | | | | | | | | | | | | | | | Add cpu clock configuration data for Exynos4412 Prime SoC (it supports additional PLL rates & CPU frequencies). Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* | clk/samsung: exynos542x: mark some clocks as criticalMarek Szyprowski2017-01-101-7/+7
|/ | | | | | | | | | | | | | | | Some parent clocks of the Exynos542x clock blocks, which have separate power domains (like DISP, MFC, MSC, GSC, FSYS and G2D) must be always enabled to access any register related to power management unit or devices connected to it. For the time being, until a proper solution based on runtime PM is applied, mark those clocks as critical (instead of ignore unused or even no flags) to prevent disabling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> [Exynos5800 Peach Pi Chromebook] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'clk-v4.10-exynos5433' of git://linuxtv.org/snawrocki/samsung into ↵Stephen Boyd2016-11-221-15/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk-next Pull Exynos5433 SoC updates from Sylwester Nawrocki: - addition of missing documentation and DT properties for the CMU_AUD block source clocks, - correction of CMU_FSYS parent clock definition, - marking as critical clocks which have to be enabled in order to access control registers of child CMUs. * tag 'clk-v4.10-exynos5433' of git://linuxtv.org/snawrocki/samsung: clk: exynos5433: Mark some clocks as critical clk: exynos5433: Add documentation for the audio block parent clocks clk: exynos5433: Fix parent clocks for FSYS block
| * clk: exynos5433: Mark some clocks as criticalMarek Szyprowski2016-11-181-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some parent clocks of the Exynos5433 CMUs must be always enabled to access any register in the given CMU or devices connected to it. For the time being, until a proper solution based on runtime PM is applied, mark those clocks as critical (instead of ignore unused) to prevent disabling them. Reported-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
| * clk: exynos5433: Fix parent clocks for FSYS blockMarek Szyprowski2016-11-171-1/+1
| | | | | | | | | | | | | | | | | | The proper parent clock for FSYS block is "aclk_fsys_200" according to the Exynos5433 reference manual. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* | clk/samsung: Use CLK_OF_DECLARE_DRIVER initialization method for CLKOUTMarek Szyprowski2016-10-281-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos PMU node is an interrupt, clock and PMU (Power Management Unit) controller, and these functionalities are supported by different drivers that matches the same compatible strings. Since commit 989eafd0b609 ("clk: core: Avoid double initialization of clocks") the OF core flags clock controllers registered with the CLK_OF_DECLARE() macro as OF_POPULATED, so platform devices with the same compatible string will not be registered. This prevents the PMU platform device to be created, so the Exynos PMU driver is never probed. This breaks (among other things) Suspend-to-RAM. Fix this by changing CLKOUT driver initialization method to CLK_OF_DECLARE_DRIVER(), which doesn't clear the OF_POPULATED flag, so later a platform device is created and the Exynos PMU platform driver can be be probed properly. Fixes: 989eafd0b609 ("clk: core: Avoid double initialization of clocks") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: samsung: clk-exynos-audss: Fix module autoloadJavier Martinez Canillas2016-10-181-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the driver is built as a module, autoload won't work because the module alias information is not filled. So user-space can't match the registered device with the corresponding module. Export the module alias information using the MODULE_DEVICE_TABLE() macro. Before this patch: $ modinfo drivers/clk/samsung/clk-exynos-audss.ko | grep alias alias: platform:exynos-audss-clk After this patch: $ modinfo drivers/clk/samsung/clk-exynos-audss.ko | grep alias alias: platform:exynos-audss-clk alias: of:N*T*Csamsung,exynos5420-audss-clockC* alias: of:N*T*Csamsung,exynos5420-audss-clock alias: of:N*T*Csamsung,exynos5410-audss-clockC* alias: of:N*T*Csamsung,exynos5410-audss-clock alias: of:N*T*Csamsung,exynos5250-audss-clockC* alias: of:N*T*Csamsung,exynos5250-audss-clock alias: of:N*T*Csamsung,exynos4210-audss-clockC* alias: of:N*T*Csamsung,exynos4210-audss-clock Fixes: 4d252fd5719b ("clk: samsung: Allow modular build of the Audio Subsystem CLKCON driver") Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: samsung: Add support for EPLL on exynos5410Sylwester Nawrocki2016-09-093-2/+131
| | | | | | | | | | | | | | | This patch adds code instantiating the EPLL, which is used as the audio subsystem's root clock. The requirement to specify the external root clock in clocks property is documented. Having the consumer 'clocks' property ensures proper initialization order by explicitly specifying dependencies in DT. It prevents situations when the SoC's clock controller driver has initialized, the external oscillator clock is not yet registered and setting clock frequencies through assigned-clock-rates property doesn't work properly due to unknown external oscillator frequency. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
* clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanupSylwester Nawrocki2016-09-091-7/+4
| | | | | | | There is no need to log probe() completion in normal conditions so the "setup completed" log is removed. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: clk-exynos-audss: Add exynos5410 compatibleSylwester Nawrocki2016-09-091-0/+9
| | | | | | | | | | | Exynos5410 Audio Subsystem Clock Controller, comparing to the already supported IP block revisions, has additionally an I2S_MST divider so a new compatible string is added. It is not clear from the Exynos5410 User's Manual released on 2012.03.09 where in the clock tree the I2S_MST clock divider can be found exactly so this clock is left unimplemented for now. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: clk-exynos-audss: controller variant handling reworkSylwester Nawrocki2016-09-091-27/+37
| | | | | | | Then variant handling is reworked to make the code simpler when more variants are added. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: Use common registration function for pll2550xSylwester Nawrocki2016-09-093-49/+13
| | | | | | | | | | | There is no such significant differences in pll2550x PLL type to justify a separate registration function. This patch adapts exynos5440 driver to use the common function and removes samsung_clk_register_pll2550x(). Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
* clk: samsung: exynos5410: Expose the peripheral DMA gate clocksSylwester Nawrocki2016-09-091-0/+2
| | | | | | | These clocks are needed in order to use the PL330 peripheral DMA controllers. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5420: Add clocks for CMU_CDREX domainChanwoo Choi2016-09-091-0/+37
| | | | | | | | | | | This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express Controller) which generates the clocks for DRAM and NoC (Network on Chip) bus. There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420 and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source group. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify codeChanwoo Choi2016-09-091-20/+13
| | | | | | | | This patch uses the samsung_cmu_register_one() to simplify code and move the pll/mux/div/gate data to initconst section. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5260: Move struct samsung_cmu_info to init sectionChanwoo Choi2016-09-091-175/+175
| | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the samsung_cmu_info struct instances to initconst section, this decreases the kernel image size by 784 bytes, which makes zImage smaller by 480 bytes. The patch increases .init.rodata section size by 780 bytes but decreases .init.text section size by 1564 bytes. Size of the drivers/clk/samsung/clk-exynos5260.o object file is 29100 bytes without the patch and 28316 after applying the patch. The section size differences are as below: 15c15 < 3 .init.text 000006b8 00000000 00000000 00000034 2**2 --- > 3 .init.text 0000009c 00000000 00000000 00000034 2**2 25c25 < 8 .init.rodata 00003f6c 00000000 00000000 00002f20 2**2 --- > 8 .init.rodata 00004278 00000000 00000000 00002904 2**2 Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: Allow modular build of the Audio Subsystem CLKCON driverSylwester Nawrocki2016-07-133-12/+11
| | | | | | | | | | | | Any clock dependencies can be properly handled with deferred probing so we can remove core_initcall and switch to a proper loadable platform driver module. This change has been tested on Exynos4412 Odroid U3 based board. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1467987300-31450-1-git-send-email-s.nawrocki@samsung.com
* clk: samsung: make clk-s5pv210-audss explicitly non-modularPaul Gortmaker2016-07-131-27/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig currently controlling compilation of this code is: arch/arm/mach-s5pv210/Kconfig:config ARCH_S5PV210 arch/arm/mach-s5pv210/Kconfig: bool "Samsung S5PV210/S5PC110" if ARCH_MULTI_V7 ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since this code is already not using module_init, case, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tags etc. since all that information is already contained at the top of the file in the comments. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160704211220.5685-8-paul.gortmaker@windriver.com
* clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocksAndi Shyti2016-07-131-3/+2
| | | | | | | | | | | | | | | | | Because the Exynos5433 SPI driver supports the ioclk handling and the following patch: http://marc.info/?l=linux-kernel&m=146787645626318&w=2 fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1468317736-18841-8-git-send-email-andi.shyti@samsung.com
* clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE deviceJaehoon Chung2016-06-101-5/+6
| | | | | | | | | | | This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks which need to remain enabled. The 'pcie' gate clock definition is also added. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> [s.nawrocki@samsung.com: edited the patch's summary] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flags to avoid hang during S2RJonghwa Lee2016-06-101-12/+22
| | | | | | | | | | Some clocks are required to be unmasked during suspend to RAM. Otherwise the PMU will stuck and the power down sequence will never be completed. Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> [s.nawrocki@samsung.com: edited the patch's summary] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UARTBeomho Seo2016-06-101-1/+1
| | | | | | | | | | This patch adds CLK_IGNORE_UNUSED flag for sclk_aud_uart gate clock for uart3 operation. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> [s.nawrocki@samsung.com: edited the patch's summary] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos4: fixup reg access on beMatthew Leach2016-06-101-2/+2
| | | | | | | | Use the byte-order aware big endian accessors, allowing for kernels running under big-endian. Signed-off-by: Matthew Leach <matthew@mattleach.net> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: fixup endian in pll clkMatthew Leach2016-06-101-61/+61
| | | | | | | | Fix the clk endian access code to deal with kernels built for big endian operation. Signed-off-by: Matthew Leach <matthew@mattleach.net> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocksKrzysztof Kozlowski2016-06-021-0/+4
| | | | | | | | Add clock hierarchy for Security SubSystem clock and watchdog. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: add CPU clocks configuration data and instantiate ↵Bartlomiej Zolnierkiewicz2016-06-021-8/+64
| | | | | | | | | | | | CPU clocks Add the CPU clocks configuration data and instantiate the CPU clocks type for Exynos5433. Cc: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: cpu: prepare for adding Exynos5433 CPU clocksBartlomiej Zolnierkiewicz2016-06-022-2/+133
| | | | | | | | | | | | | Exynos5433 uses different register layout for CPU clock registers than earlier SoCs so add new code for handling this layout. Also add new CLK_CPU_HAS_E5433_REGS_LAYOUT flag to request using it. There should be no functional change resulting from this patch. Cc: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: prepare for adding CPU clocksBartlomiej Zolnierkiewicz2016-06-023-36/+65
| | | | | | | | | | | | | Open-code samsung_cmu_register_one() calls for CMU_APOLLO and CMU_ATLAS setup code as a preparation for adding CPU clocks support for Exynos5433. There should be no functional change resulting from this patch. Cc: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: Suppress unbinding to prevent theoretical attacksKrzysztof Kozlowski2016-06-022-2/+4
| | | | | | | | | | | | | | | | | | | Although unbinding a driver requires root privileges but it still might be used theoretically in certain attacks (by triggering NULL pointer exception or memory corruption if driver does not provide proper remove callbacks or core does not handle it). Samsung clock drivers are essential for system operation so their removal is not expected. More over, the Exynos3250 ISP clock driver does not implement remove() driver callback and it is not buildable as modules. Suppress the unbind interface for Exynos3250 ISP and S3C2410 DCLK clock drivers. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5420: Set ID for aclk333 gate clockJavier Martinez Canillas2016-06-021-1/+1
| | | | | | | | | | | The aclk333 clock needs to be ungated during the MFC power domain switch, so set the clock ID to allow the Exynos power domain logic to lookup this clock if is defined in the MFC PD device tree node. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Add TMU clockKrzysztof Kozlowski2016-06-021-0/+1
| | | | | | | | Add clock for TMU to the Exynos5410 clock driver. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Add I2C, HSI2C and RTC clocksKrzysztof Kozlowski2016-06-021-0/+9
| | | | | | | | | Add clocks for I2C, USI (HSI2C) and RTC to the Exynos5410 clock driver. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Add serial3, USB and PWM clocksKrzysztof Kozlowski2016-06-021-0/+36
| | | | | | | | | | | | Just like other Exynos5 family SoCs, this one has four UARTs. Add missing UART3 clocks to the Exynos5410 clock driver. Add clocks for USB and PWM. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos3250: Move PLL rates data to init sectionKrzysztof Kozlowski2016-06-021-2/+2
| | | | | | | | | The arrays with initialization data of PLLs can be moved to initconst section because they are referenced only from other initconst-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: Fully constify mux parent namesKrzysztof Kozlowski2016-06-021-1/+1
| | | | | | | | | | The PNAME macro defines array of strings for names of mux parents. Although the strings itself were const but pointers to them were not thus this data resided in initdata. Make this an array of const pointers to const strings and move to initconst section. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5250: Move sleep init function to init sectionKrzysztof Kozlowski2016-06-021-2/+2
| | | | | | | | The exynos5250_clk_sleep_init() function can be moved to init section because it is referenced only from other init-level calls. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5420: Move sleep init function and PLL data to init sectionKrzysztof Kozlowski2016-06-021-3/+3
| | | | | | | | | The exynos5420_clk_sleep_init() function and arrays with initialization data of PLLs can be moved to init section because they are referenced only from other init-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: Move PLL rates data to init sectionKrzysztof Kozlowski2016-06-021-2/+2
| | | | | | | | | The arrays with initialization data of PLLs can be moved to initconst section because they are referenced only from other initconst-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5433: Constify all clock initializersKrzysztof Kozlowski2016-06-021-120/+120
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos7: Constify all clock initializersKrzysztof Kozlowski2016-06-021-57/+57
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5440: Constify all clock initializersKrzysztof Kozlowski2016-06-021-5/+5
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5420: Constify all clock initializersKrzysztof Kozlowski2016-06-021-15/+15
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5410: Constify all clock initializersKrzysztof Kozlowski2016-06-021-4/+4
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5260: Constify all clock initializersKrzysztof Kozlowski2016-06-021-57/+57
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos5250: Constify all clock initializersKrzysztof Kozlowski2016-06-021-10/+10
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos4415: Move PLL rates data to init sectionKrzysztof Kozlowski2016-06-021-2/+2
| | | | | | | | | The arrays with initialization data of PLLs can be moved to initconst section because they are referenced only from other initconst-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos4415: Constify all clock initializersKrzysztof Kozlowski2016-06-021-15/+15
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos4: Constify all clock initializersKrzysztof Kozlowski2016-06-021-28/+28
| | | | | | | All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk: samsung: exynos4: Move local function to init sectionKrzysztof Kozlowski2016-06-021-1/+1
| | | | | | | | The local exynos4_get_xom() function is referenced only from other init-level functions. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-24 16:03:01 +0100