summaryrefslogtreecommitdiffstats
path: root/drivers/clk/samsung (follow)
Commit message (Expand)AuthorAgeFilesLines
...
| * clk: exynos-audss: convert to platform deviceAndrew Bresticker2014-01-081-16/+88
| * clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-47/+34
| * clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-339/+309
| * clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-295/+264
| * clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-455/+402
| * clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-081-1/+24
| * clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-301-1/+2
| * clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-301-3/+5
| * clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-301-3/+3
| * clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-301-4/+12
| * clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-301-6/+8
| * clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-301-8/+17
| * clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-301-122/+123
| * clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa2013-12-301-102/+188
| * Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa2013-12-303-11/+15
| |\
| * | clk: exynos5420: fix cpll clock register offsetsChander Kashyap2013-12-041-2/+2
* | | Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2014-01-241-1/+2
|\ \ \
| * | | clk: samsung: exynos4: Fix definition of div_mmc_pre4 dividerTomasz Figa2013-12-201-1/+2
| |/ /
* | | Merge branch 'for-next' into for-linusTakashi Iwai2014-01-201-2/+2
|\ \ \ | |_|/ |/| |
| * | clk: samsung: s3c64xx: Remove clock aliases of old DMA driverTomasz Figa2013-11-241-2/+0
| * | clk: samsung: s3c64xx: Add aliases for DMA clocksTomasz Figa2013-11-241-0/+2
| |/
* | clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski2013-12-301-5/+5
* | clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-301-1/+2
* | clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-301-1/+4
* | clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-301-1/+1
* | clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker2013-12-301-2/+2
* | clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim2013-12-301-1/+1
|/
* ARM: S3C64XX: Migrate clock handling to Common Clock FrameworkTomasz Figa2013-09-161-2/+0
* Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-09-1011-508/+1702
|\
| * clk: samsung: exynos5250: Simplify registration of PLL rate tablesTomasz Figa2013-09-061-10/+2
| * clk: samsung: exynos4: Register PLL rate tables for Exynos4x12Tomasz Figa2013-09-061-0/+49
| * clk: samsung: exynos4: Register PLL rate tables for Exynos4210Tomasz Figa2013-09-061-0/+45
| * clk: samsung: exynos4: Reorder registration of mout_vpllsrcTomasz Figa2013-09-061-1/+7
| * clk: samsung: pll: Add support for rate configuration of PLL46xxTomasz Figa2013-09-062-1/+135
| * clk: samsung: pll: Use new registration method for PLL46xxTomasz Figa2013-09-063-65/+14
| * clk: samsung: pll: Add support for rate configuration of PLL45xxTomasz Figa2013-09-062-1/+119
| * clk: samsung: pll: Use new registration method for PLL45xxTomasz Figa2013-09-063-62/+20
| * clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_pllsTomasz Figa2013-09-061-3/+3
| * clk: samsung: exynos4: Remove checks for DT nodeTomasz Figa2013-09-061-7/+4
| * clk: samsung: exynos4: Remove unused static clkdev aliasesTomasz Figa2013-09-061-184/+172
| * clk: samsung: Modify _get_rate() helper to use __clk_lookup()Tomasz Figa2013-09-063-9/+7
| * clk: samsung: exynos4: Use separate aliases for cpufreq related clocksTomasz Figa2013-09-061-8/+27
| * clk/exynos5420: assign dout_pixel id to pixel clock dividerRahul Sharma2013-08-301-1/+4
| * clk/exynos5420: add hdmi mux to change parents in hdmi driverRahul Sharma2013-08-301-1/+4
| * clk/exynos5420: fix the order of parents of hdmi muxRahul Sharma2013-08-301-1/+1
| * clk/exynos5420: add gate clock for mixer sysmmuRahul Sharma2013-08-301-1/+2
| * clk/exynos5420: add sclk_hdmiphy to the list of special clocksRahul Sharma2013-08-301-2/+2
| * clk/exynos5250: change parent to aclk200_disp1 for hdmi subsystemRahul Sharma2013-08-291-2/+2
| * clk: s3c64xx: Fix incorrect placement of __initdataSachin Kamat2013-08-281-2/+2
| * Merge branch 'clk-next-s3c64xx-delta' into clk-nextMike Turquette2013-08-282-98/+13
| |\
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 08:22:58 +0100