index
:
linux
master
linux
Fast-forward packages
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
socfpga
/
clk-agilex.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: socfpga: agilex: fix duplicate s2f_user0_clk
Dinh Nguyen
2021-09-25
1
-9
/
+0
*
clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
Dinh Nguyen
2021-07-27
1
-1
/
+1
*
clk: socfpga: agilex: fix up s2f_user0_clk representation
Dinh Nguyen
2021-07-27
1
-0
/
+9
*
clk: socfpga: agilex: fix the parents of the psi_ref_clk
Dinh Nguyen
2021-07-27
1
-4
/
+4
*
clk: agilex/stratix10: add support for the 2nd bypass
Dinh Nguyen
2021-06-28
1
-1
/
+3
*
clk: agilex/stratix10: fix bypass representation
Dinh Nguyen
2021-06-28
1
-11
/
+46
*
clk: agilex/stratix10: remove noc_clk
Dinh Nguyen
2021-06-28
1
-17
/
+15
*
clk: socfpga: Fix code formatting
Stephen Boyd
2021-03-31
1
-1
/
+2
*
clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
Dinh Nguyen
2021-03-31
1
-54
/
+60
*
clk: socfpga: agilex: add clock driver for eASIC N5X platform
Dinh Nguyen
2021-02-12
1
-2
/
+86
*
clk: socfpga: agilex: Remove unused variable 'cntr_mux'
YueHaibing
2020-09-22
1
-13
/
+0
*
clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clk
Dinh Nguyen
2020-06-20
1
-1
/
+1
*
clk: socfpga: agilex: add nand_x_clk and nand_ecc_clk
Dinh Nguyen
2020-06-20
1
-1
/
+5
*
clk: socfpga: agilex: add clock driver for the Agilex platform
Dinh Nguyen
2020-05-27
1
-0
/
+454