| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clk | Dinh Nguyen | 2020-06-20 | 1 | -1/+1 |
| * | clk: socfpga: agilex: add nand_x_clk and nand_ecc_clk | Dinh Nguyen | 2020-06-20 | 1 | -1/+5 |
| * | clk: socfpga: agilex: add clock driver for the Agilex platform | Dinh Nguyen | 2020-05-27 | 1 | -0/+454 |
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