| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: socfpga: Silence sparse warning | Stephen Boyd | 2015-05-15 | 1 | -1/+1 |
| * | clk: socfpga: add divider registers to the main pll outputs | Dinh Nguyen | 2014-05-12 | 1 | -1/+0 |
| * | clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk" | Dinh Nguyen | 2014-02-18 | 1 | -0/+68 |
| * | clk: socfpga: split clk code | Steffen Trumtrar | 2014-02-18 | 1 | -0/+195 |
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