| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: socfpga: use clk_hw_register for a5/c5 | Dinh Nguyen | 2021-03-31 | 1 | -4/+4 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 2019-05-30 | 1 | -11/+1 |
| * | clk: socfpga: Add a second parent option for the dbg_base_clk | Dinh Nguyen | 2015-08-25 | 1 | -4/+14 |
| * | clk: socfpga: switch to GENMASK() | Andy Shevchenko | 2015-07-28 | 1 | -1/+1 |
| * | clk: socfpga: Remove clk.h and clkdev.h includes | Stephen Boyd | 2015-07-20 | 1 | -2/+1 |
| * | clk: socfpga: Silence sparse warning | Stephen Boyd | 2015-05-15 | 1 | -1/+1 |
| * | clk: socfpga: add divider registers to the main pll outputs | Dinh Nguyen | 2014-05-12 | 1 | -3/+19 |
| * | clk: socfpga: split clk code | Steffen Trumtrar | 2014-02-18 | 1 | -0/+94 |
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