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path: root/drivers/clk/socfpga/clk-pll-s10.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: socfpga: cleanup spdx tagsTom Rix2022-03-121-1/+1
* clk: socfpga: remove redundant assignment on divisionColin Ian King2022-01-061-1/+1
* clk: socfpga: remove redundant initialization of variable divColin Ian King2021-04-081-1/+1
* clk: socfpga: Convert to s10/agilex/n5x to use clk_hwDinh Nguyen2021-03-311-18/+25
* clk: socfpga: agilex: add clock driver for eASIC N5X platformDinh Nguyen2021-02-121-0/+83
* clk: socfpga: agilex: add clock driver for the Agilex platformDinh Nguyen2020-05-271-0/+68
* clk: socfpga: add const to _ops data structuresDinh Nguyen2020-05-271-2/+2
* clk: socfpga: remove clk_ops enable/disable methodsDinh Nguyen2020-05-271-2/+0
* clk: socfpga: stratix10: use new parent data schemeDinh Nguyen2020-05-271-2/+2
* clk: socfpga: stratix10: simplify parameter passingDinh Nguyen2020-02-131-6/+7
* clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen2020-02-131-1/+3
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-151-0/+1
* clk: socfpga: stratix10: fix rate calculation for pll clocksDinh Nguyen2019-01-121-1/+1
* clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen2018-04-061-0/+146
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