| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: socfpga: stratix10: fix rate calculation for pll clocks | Dinh Nguyen | 2019-01-12 | 1 | -1/+1 |
| * | clk: socfpga: stratix10: add clock driver for Stratix10 platform | Dinh Nguyen | 2018-04-06 | 1 | -0/+146 |
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