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path: root/drivers/clk/sunxi-ng/Kconfig (follow)
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* clk: sunxi-ng: h3: Fix Kconfig symbol typoMaxime Ripard2016-07-111-1/+1
| | | | | | | | The Kconfig symbol for the sun8i SoC family was mistyped. Fix that. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160711203448.18062-2-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add H3 clocksMaxime Ripard2016-07-091-0/+13
| | | | | | | | Add the list of clocks and resets found in the H3 CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add N-K-M-P factor clockMaxime Ripard2016-07-091-0/+5
| | | | | | | | | | Introduce support for clocks that use a combination of two linear multipliers (N and K factors), one linear divider (M) and one power of two divider (P). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-13-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add N-K-M Factor clockMaxime Ripard2016-07-091-0/+5
| | | | | | | | | Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add N-M-factor clock supportMaxime Ripard2016-07-091-0/+6
| | | | | | | | Introduce support for clocks that multiply and divide using linear factors. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-11-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add N-K-factor clock supportMaxime Ripard2016-07-091-0/+4
| | | | | | | | | Introduce support for clocks that use a combination of two linear multipliers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-10-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard2016-07-091-0/+7
| | | | | | | | | Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add dividerMaxime Ripard2016-07-091-0/+4
| | | | | | | | | Add support for the various dividers (linear, table or pow-of-two based) found in the CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-8-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add phase clock supportMaxime Ripard2016-07-091-0/+3
| | | | | | | | | Add support for the clocks in the CCU that introduce a phase shift from their parent clock. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-7-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add mux clock supportMaxime Ripard2016-07-091-0/+3
| | | | | | | | | | | | | | Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that would benefit from the code in there to deal with "advanced" features, like pre-dividers. Introduce a set of helpers to reduce the code duplication in such cases. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add gate clock supportMaxime Ripard2016-07-091-0/+3
| | | | | | | | | | | | Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be found in more complex clocks, provide a bunch of helpers that can be reused later on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-5-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add fractional libMaxime Ripard2016-07-091-0/+9
| | | | | | | | | | | Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-4-maxime.ripard@free-electrons.com
* clk: sunxi-ng: Add common infrastructureMaxime Ripard2016-07-091-0/+3
Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
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