| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq | Samuel Holland | 2021-11-23 | 1 | -2/+0 |
| * | clk: sunxi-ng: a64: Export MBUS clock | Jernej Skrabec | 2020-02-11 | 1 | -4/+0 |
| * | clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS | Vasily Khoruzhick | 2020-01-04 | 1 | -1/+0 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 2019-05-30 | 1 | -10/+1 |
| * | dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro | Jagan Teki | 2018-09-05 | 1 | -1/+3 |
| * | clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM | Chen-Yu Tsai | 2017-05-31 | 1 | -1/+3 |
| * | clk: sunxi-ng: Add A64 clocks | Maxime Ripard | 2016-11-03 | 1 | -0/+72 |
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