Commit message (Expand) | Author | Age | Files | Lines | |
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* | Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel... | Stephen Boyd | 2017-04-19 | 1 | -7/+11 |
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| * | clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor | Chen-Yu Tsai | 2017-04-05 | 1 | -7/+11 |
* | | clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change | Chen-Yu Tsai | 2017-04-13 | 1 | -0/+11 |
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* | clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU | Maxime Ripard | 2017-01-27 | 1 | -1/+1 |
* | clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig | Mylène Josserand | 2017-01-17 | 1 | -1/+1 |
* | clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33 | Icenowy Zheng | 2017-01-02 | 1 | -1/+1 |
* | clk: sunxi-ng: fix PLL_CPUX adjusting on A33 | Icenowy Zheng | 2017-01-02 | 1 | -0/+10 |
* | clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock | Icenowy Zheng | 2016-11-23 | 1 | -1/+1 |
* | clk: sunxi-ng: Fix reset offset for the A23 and A33 | Maxime Ripard | 2016-09-21 | 1 | -8/+8 |
* | clk: sunxi-ng: Add A33 CCU support | Maxime Ripard | 2016-09-10 | 1 | -0/+780 |