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path:
root
/
drivers
/
clk
/
sunxi-ng
/
ccu-sun8i-h3.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: Explicitly include correct DT includes
Rob Herring
2023-07-19
1
-1
/
+1
*
clk: sunxi-ng: h3/h5: Model H3 CLK_DRAM as a fixed clock
Samuel Holland
2023-01-08
1
-5
/
+10
*
clk: sunxi-ng: Deduplicate ccu_clks arrays
Samuel Holland
2022-06-06
1
-110
/
+3
*
clk: sunxi-ng: Convert early providers to platform drivers
Samuel Holland
2021-11-23
1
-21
/
+41
*
clk: sunxi-ng: Unregister clocks/resets when unbinding
Samuel Holland
2021-09-13
1
-1
/
+1
*
clk: sunxi-ng: Make sure divider tables have sentinel
Jernej Skrabec
2020-12-20
1
-0
/
+1
*
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2019-07-17
1
-10
/
+19
|
\
|
*
clk: sunxi-ng: h3: Use local parent references for CLK_FIXED_FACTOR
Chen-Yu Tsai
2019-06-18
1
-10
/
+19
*
|
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Thomas Gleixner
2019-06-05
1
-9
/
+1
|
/
*
clk: Remove io.h from clk-provider.h
Stephen Boyd
2019-05-15
1
-0
/
+1
*
clk: sunxi-ng: h3: Allow parent change for ve clock
Jernej Skrabec
2018-12-04
1
-1
/
+1
*
clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
Chen-Yu Tsai
2018-12-03
1
-1
/
+1
*
clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video
Jernej Skrabec
2018-08-27
1
-12
/
+13
*
clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate
Jernej Skrabec
2018-03-02
1
-3
/
+6
*
clk: sunxi-ng: h3: h5: Add minimal rate for video PLL
Jernej Skrabec
2018-03-02
1
-11
/
+12
*
clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL
Chen-Yu Tsai
2017-10-13
1
-13
/
+25
*
clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock
Icenowy Zheng
2017-09-17
1
-1
/
+1
*
clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs
Icenowy Zheng
2017-09-17
1
-9
/
+9
*
Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kern...
Stephen Boyd
2017-08-24
1
-1
/
+12
|
\
|
*
clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3
Icenowy Zheng
2017-08-04
1
-1
/
+1
|
*
clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change
Chen-Yu Tsai
2017-08-04
1
-0
/
+11
*
|
clk: Convert to using %pOF instead of full_name
Rob Herring
2017-07-22
1
-2
/
+1
|
/
*
clk: sunxi-ng: Support multiple variable pre-dividers
Chen-Yu Tsai
2017-06-07
1
-5
/
+5
*
clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver
Icenowy Zheng
2017-03-06
1
-7
/
+320
*
clk: sunxi-ng: fix PLL_CPUX adjusting on H3
Ondrej Jirman
2017-01-02
1
-0
/
+10
*
clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
Chen-Yu Tsai
2016-11-11
1
-5
/
+5
*
Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...
Stephen Boyd
2016-09-14
1
-5
/
+5
|
\
|
*
clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
Chen-Yu Tsai
2016-08-25
1
-5
/
+5
*
|
clk: sunxi-ng: Fix wrong reset register offsets
Jorik Jonker
2016-08-29
1
-8
/
+8
|
/
*
clk: sunxi-ng: h3: Fix audio clock divider offset
Maxime Ripard
2016-07-11
1
-2
/
+2
*
clk: sunxi-ng: Add H3 clocks
Maxime Ripard
2016-07-09
1
-0
/
+826