| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 | Colin Ian King | 2019-10-29 | 1 | -1/+1 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | Thomas Gleixner | 2019-06-05 | 1 | -9/+1 |
| * | clk: Remove io.h from clk-provider.h | Stephen Boyd | 2019-05-15 | 1 | -0/+1 |
| * | clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code | Chen-Yu Tsai | 2017-04-13 | 1 | -2/+1 |
| * | clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks | Chen-Yu Tsai | 2017-04-05 | 1 | -18/+52 |
| * | clk: sunxi-ng: Add A80 CCU | Chen-Yu Tsai | 2017-01-30 | 1 | -0/+1223 |
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