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path: root/drivers/clk/sunxi-ng (follow)
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* clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clockIcenowy Zheng2016-11-231-1/+1
* clk: sunxi-ng: sun6i-a31: Enable PLL-MIPI LDOs when ungating itChen-Yu Tsai2016-11-211-1/+1
* clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parentChen-Yu Tsai2016-10-191-0/+12
* clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard2016-09-212-16/+16
* clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clkChen-Yu Tsai2016-09-171-1/+1
* clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLsChen-Yu Tsai2016-09-171-10/+10
* clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocksChen-Yu Tsai2016-09-171-9/+13
* Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2016-09-1419-78/+3349
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| * clk: sunxi-ng: Add hardware dependencyJean Delvare2016-09-101-0/+1
| * clk: sunxi-ng: Add A23 CCUMaxime Ripard2016-09-103-0/+750
| * clk: sunxi-ng: Add A33 CCU supportMaxime Ripard2016-09-104-0/+856
| * clk: sunxi-ng: Add N-class clocks supportMaxime Ripard2016-09-104-0/+173
| * clk: sunxi-ng: mux: Add mux table macroMaxime Ripard2016-09-101-13/+13
| * clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard2016-09-105-33/+55
| * clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard2016-09-101-0/+14
| * clk: sunxi-ng: div: Add mux table macrosMaxime Ripard2016-09-101-7/+21
| * clk: sunxi-ng: Add A31/A31s clocksChen-Yu Tsai2016-08-254-0/+1318
| * clk: sunxi-ng: mux: Add clk notifier functionsChen-Yu Tsai2016-08-252-0/+50
| * clk: sunxi-ng: mux: support fixed pre-dividers on multiple parentsChen-Yu Tsai2016-08-253-11/+16
| * clk: sunxi-ng: mux: Add support for mux tablesChen-Yu Tsai2016-08-252-6/+23
| * clk: sunxi-ng: mux: Rename mux macro to be consistentMaxime Ripard2016-08-254-6/+6
| * clk: sunxi-ng: nkm: Add mux to support multiple parentsChen-Yu Tsai2016-08-082-6/+57
| * clk: sunxi-ng: mux: Increase fixed pre-divider div sizeChen-Yu Tsai2016-08-082-2/+2
* | clk: sunxi-ng: Fix wrong reset register offsetsJorik Jonker2016-08-291-8/+8
* | clk: sunxi-ng: nk: Make ccu_nk_find_best staticChen-Yu Tsai2016-08-081-3/+3
* | clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lockChen-Yu Tsai2016-08-081-1/+1
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* clk: sunxi-ng: h3: Fix Kconfig symbol typoMaxime Ripard2016-07-111-1/+1
* clk: sunxi-ng: h3: Fix audio clock divider offsetMaxime Ripard2016-07-111-2/+2
* clk: sunxi-ng: Add H3 clocksMaxime Ripard2016-07-094-0/+904
* clk: sunxi-ng: Add N-K-M-P factor clockMaxime Ripard2016-07-094-0/+244
* clk: sunxi-ng: Add N-K-M Factor clockMaxime Ripard2016-07-094-0/+227
* clk: sunxi-ng: Add N-M-factor clock supportMaxime Ripard2016-07-094-0/+212
* clk: sunxi-ng: Add N-K-factor clock supportMaxime Ripard2016-07-094-0/+223
* clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard2016-07-094-0/+245
* clk: sunxi-ng: Add dividerMaxime Ripard2016-07-094-0/+274
* clk: sunxi-ng: Add phase clock supportMaxime Ripard2016-07-094-0/+180
* clk: sunxi-ng: Add mux clock supportMaxime Ripard2016-07-094-0/+282
* clk: sunxi-ng: Add gate clock supportMaxime Ripard2016-07-094-0/+138
* clk: sunxi-ng: Add fractional libMaxime Ripard2016-07-094-0/+175
* clk: sunxi-ng: Add common infrastructureMaxime Ripard2016-07-097-0/+291
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 23:55:45 +0100