| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2018-10-31 | 10 | -86/+143 |
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| * | dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro | Jagan Teki | 2018-09-05 | 1 | -1/+3 |
| * | clk: sunxi-ng: a64: Add max. rate constraint to video PLLs | Icenowy Zheng | 2018-09-05 | 1 | -24/+26 |
| * | clk: sunxi-ng: a64: Add minimal rate for video PLLs | Jagan Teki | 2018-09-05 | 1 | -22/+24 |
| * | clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks | Icenowy Zheng | 2018-09-05 | 1 | -20/+23 |
| * | clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs | Jernej Skrabec | 2018-08-27 | 1 | -0/+2 |
| * | clk: sunxi-ng: nkmp: Add constraint for maximum rate | Jernej Skrabec | 2018-08-27 | 2 | -0/+8 |
| * | clk: sunxi-ng: r40: Add max. rate constraint to video PLLs | Jernej Skrabec | 2018-08-27 | 1 | -26/+26 |
| * | clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video | Jernej Skrabec | 2018-08-27 | 1 | -12/+13 |
| * | clk: sunxi-ng: Add maximum rate constraint to NM PLLs | Jernej Skrabec | 2018-08-27 | 2 | -0/+37 |
| * | clk: sunxi-ng: h6: fix PWM gate/reset offset | Rongyi Chen | 2018-08-27 | 1 | -1/+1 |
| * | clk: sunxi-ng: h6: fix bus clocks' divider position | Icenowy Zheng | 2018-08-27 | 1 | -4/+4 |
* | | clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting | Chen-Yu Tsai | 2018-09-07 | 1 | -1/+9 |
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* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2018-08-16 | 3 | -35/+42 |
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| * | clk: sunxi-ng: add A64 compatible string | Icenowy Zheng | 2018-06-27 | 1 | -7/+4 |
| * | clk: sunxi-ng: r40: Export video PLLs | Jernej Skrabec | 2018-06-27 | 1 | -2/+6 |
| * | clk: sunxi-ng: r40: Allow setting parent rate to display related clocks | Jernej Skrabec | 2018-06-27 | 1 | -4/+8 |
| * | clk: sunxi-ng: r40: Add minimal rate for video PLLs | Jernej Skrabec | 2018-06-27 | 1 | -22/+24 |
* | | clk: sunxi-ng: replace lib-y with obj-y | Masahiro Yamada | 2018-06-21 | 1 | -24/+15 |
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* | clk: sunxi-ng: r40: export a regmap to access the GMAC register | Icenowy Zheng | 2018-05-17 | 1 | -0/+33 |
* | clk: sunxi-ng: r40: rewrite init code to a platform driver | Icenowy Zheng | 2018-05-17 | 1 | -11/+28 |
* | clk: sunxi-ng: add support for H6 PRCM CCU | Icenowy Zheng | 2018-05-04 | 4 | -0/+232 |
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2018-04-14 | 10 | -35/+1375 |
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| * | clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU | Icenowy Zheng | 2018-03-21 | 2 | -1/+5 |
| * | clk: sunxi-ng: add support for the Allwinner H6 CCU | Icenowy Zheng | 2018-03-18 | 4 | -0/+1269 |
| * | clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks | Icenowy Zheng | 2018-03-18 | 2 | -3/+19 |
| * | clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO | Jernej Skrabec | 2018-03-02 | 1 | -1/+3 |
| * | clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate | Jernej Skrabec | 2018-03-02 | 1 | -3/+6 |
| * | clk: sunxi-ng: h3: h5: Add minimal rate for video PLL | Jernej Skrabec | 2018-03-02 | 1 | -11/+12 |
| * | clk: sunxi-ng: Add check for minimal rate to NM PLLs | Jernej Skrabec | 2018-03-02 | 2 | -0/+34 |
| * | clk: sunxi-ng: Use u64 for calculation of nkmp rate | Jernej Skrabec | 2018-02-15 | 1 | -3/+18 |
| * | clk: sunxi-ng: Mask nkmp factors when setting register | Jernej Skrabec | 2018-02-15 | 1 | -9/+12 |
| * | clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name | Corentin Labbe | 2018-02-13 | 1 | -7/+0 |
* | | clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops | Chen-Yu Tsai | 2018-02-19 | 1 | -3/+3 |
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*-. | Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner... | Stephen Boyd | 2018-01-27 | 7 | -43/+185 |
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| | * | clk: sunxi-ng: a83t: Add M divider to TCON1 clock | Jernej Škrabec | 2018-01-03 | 1 | -2/+2 |
| | * | clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU | Icenowy Zheng | 2017-12-29 | 1 | -3/+3 |
| | * | clk: sunxi-ng: add support for Allwinner H3 DE2 CCU | Icenowy Zheng | 2017-12-29 | 1 | -0/+47 |
| | * | clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL | Chen-Yu Tsai | 2017-12-08 | 1 | -1/+10 |
| | * | clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL | Chen-Yu Tsai | 2017-12-08 | 1 | -3/+6 |
| | * | clk: sunxi-ng: Support fixed post-dividers on NM style clocks | Chen-Yu Tsai | 2017-12-08 | 2 | -13/+39 |
| | * | clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks | Chen-Yu Tsai | 2017-12-07 | 1 | -20/+37 |
| | * | clk: sunxi-ng: Support fixed post-dividers on MP style clocks | Chen-Yu Tsai | 2017-12-07 | 2 | -2/+42 |
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* | | Merge branch 'clk-divider-container' into clk-next | Stephen Boyd | 2018-01-27 | 1 | -1/+1 |
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| * | | clk: divider: fix incorrect usage of container_of | Jerome Brunet | 2017-12-29 | 1 | -1/+1 |
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* / | clk: move clock common macros out from vendor directories | Chunyan Zhang | 2017-12-22 | 1 | -29/+0 |
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* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2017-11-18 | 16 | -79/+453 |
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| * | clk: sunxi-ng: a83t: Fix i2c buses bits | Mylene JOSSERAND | 2017-11-15 | 1 | -2/+2 |
| * | clk: sunxi-ng: sun4i: Export video PLLs | Jonathan Liu | 2017-10-17 | 1 | -2/+2 |
| * | clk: sunxi-ng: Add A83T display clocks | Maxime Ripard | 2017-10-17 | 1 | -8/+13 |