| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: sunxi: pll2: Fix return value check in sun4i_pll2_setup() | Wei Yongjun | 2016-08-08 | 1 | -2/+2 |
| * | clk: sunxi: pll2: Fix clock running too fast | Maxime Ripard | 2015-12-03 | 1 | -18/+5 |
| * | clk: sunxi: pll2: Add A13 support | Maxime Ripard | 2015-10-21 | 1 | -5/+33 |
| * | clk: sunxi: Add a driver for the PLL2 | Maxime Ripard | 2015-10-21 | 1 | -0/+188 |
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