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path:
root
/
drivers
/
clk
/
sunxi
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Commit message (
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Author
Age
Files
Lines
*
Merge tag 'sunxi-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kerne...
Mike Turquette
2014-09-27
6
-156
/
+485
|
\
|
*
clk: sunxi: Add sun8i MBUS clock support
Chen-Yu Tsai
2014-09-27
2
-0
/
+79
|
*
clk: sunxi: mod0: Introduce MMC proper phase handling
Maxime Ripard
2014-09-27
1
-0
/
+189
|
*
clk: sunxi: Move mbus to mod0 file
Maxime Ripard
2014-09-27
2
-57
/
+12
|
*
clk: sunxi: Move mod0 clock to a file of its own
Maxime Ripard
2014-09-27
3
-1
/
+83
|
*
clk: sunxi: Introduce mbus compatible
Maxime Ripard
2014-09-27
1
-0
/
+1
|
*
clk: sunxi: factors: Invert the probing logic
Maxime Ripard
2014-09-27
3
-99
/
+113
|
*
clk: sunxi: add correct divider table for sun4i-apb0 clock
Chen-Yu Tsai
2014-09-13
1
-0
/
+9
*
|
clk: Remove .owner field for driver
Kiran Padwal
2014-09-26
4
-4
/
+0
|
/
*
clk: sunxi: staticize structures and arrays
Emilio López
2014-07-29
4
-5
/
+5
*
clk: sunxi: add __iomem markings to MMIO pointers
Emilio López
2014-07-29
2
-6
/
+6
*
Merge tag 'sunxi-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kerne...
Mike Turquette
2014-07-26
6
-43
/
+227
|
\
|
*
clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 support
Chen-Yu Tsai
2014-07-15
1
-0
/
+5
|
*
clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indices
Chen-Yu Tsai
2014-07-15
1
-36
/
+39
|
*
clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates
Chen-Yu Tsai
2014-07-07
1
-1
/
+5
|
*
clk: sunxi: Add A23 APB0 divider clock support
Chen-Yu Tsai
2014-07-07
2
-1
/
+71
|
*
clk: sunxi: Add A23 clocks support
Chen-Yu Tsai
2014-07-04
1
-0
/
+101
|
*
clk: sunxi: Add support for table-based divider clocks
Chen-Yu Tsai
2014-07-04
1
-4
/
+5
|
*
clk: sunxi: Support factor clocks with N factor starting not from 0
Chen-Yu Tsai
2014-07-04
2
-1
/
+2
|
*
clk: sunxi: move "ahb_sdram" to protected clock list
Chen-Yu Tsai
2014-07-04
1
-5
/
+3
|
*
clk: sunxi: register clock gates with clkdev
Chen-Yu Tsai
2014-07-04
1
-0
/
+1
*
|
clk: sunxi: fix devm_ioremap_resource error detection code
Himangi Saraogi
2014-07-02
1
-1
/
+1
|
/
*
clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
Boris BREZILLON
2014-06-11
4
-0
/
+411
*
clk: sun6i: Protect SDRAM gating bit
Maxime Ripard
2014-06-11
1
-0
/
+1
*
clk: sun6i: Protect CPU clock
Maxime Ripard
2014-06-11
1
-0
/
+1
*
clk: sunxi: Rework clock protection code
Maxime Ripard
2014-06-11
1
-28
/
+44
*
clk: sunxi: Move the GMAC clock to a file of its own
Maxime Ripard
2014-06-11
3
-99
/
+121
*
clk: sunxi: Move the 24M oscillator to a file of its own
Maxime Ripard
2014-06-11
3
-57
/
+74
*
clk: sunxi: Remove calls to clk_put
Maxime Ripard
2014-06-11
1
-6
/
+2
*
clk: sunxi: Implement A31 USB clock
Maxime Ripard
2014-06-11
1
-0
/
+6
*
Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/...
Linus Torvalds
2014-06-08
2
-0
/
+73
|
\
|
*
clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk
Hans de Goede
2014-05-15
1
-1
/
+2
|
*
clk: sunxi: Implement MMC phase control
Emilio López
2014-05-06
1
-0
/
+36
|
*
clk: sunxi: factors: automatic reparenting support
Emilio López
2014-05-06
1
-0
/
+36
*
|
clk: sunxi: fix function type for CLK_OF_DECLARE
Rob Herring
2014-05-20
1
-1
/
+1
*
|
clk: sunxi: avoid double DT matching
Rob Herring
2014-05-20
1
-2
/
+1
|
/
*
clk: sunxi: fix thinko in comment
Emilio López
2014-03-19
1
-1
/
+1
*
clk: sunxi: fix some calculations
Emilio López
2014-03-19
1
-3
/
+3
*
clk: sunxi: fix A20 PLL4 calculation
Emilio López
2014-03-19
1
-0
/
+7
*
clk: sunxi: Add new clock compatibles
Maxime Ripard
2014-02-18
1
-15
/
+15
*
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit
Chen-Yu Tsai
2014-02-18
1
-0
/
+96
*
clk: sunxi: Add support for PLL6 on the A31
Maxime Ripard
2014-02-18
1
-0
/
+45
*
clk: sunxi: Add USB clock register defintions
Roman Byshko
2014-02-18
1
-0
/
+12
*
clk: sunxi: Add support for USB clock-register reset bits
Hans de Goede
2014-02-18
1
-0
/
+71
*
clk: sunxi: get divs parent clock name from parent factor clock
Chen-Yu Tsai
2014-02-03
1
-1
/
+2
*
clk: sunxi: add names for pll5, pll6 parent clocks to factors_data
Chen-Yu Tsai
2014-02-03
1
-9
/
+18
*
clk: sunxi: add clock-output-names dt property support
Chen-Yu Tsai
2014-02-03
1
-0
/
+6
*
clk: sunxi: fix overflow when setting up divided factors
Emilio López
2014-01-27
1
-1
/
+1
*
clk: sunxi: Allwinner A20 output clock support
Chen-Yu Tsai
2013-12-28
1
-0
/
+57
*
clk: sunxi: support better factor DT nodes
Emilio López
2013-12-28
1
-0
/
+9
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