Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: tegra: Use override bits when needed | Peter De Schrijver | 2013-06-12 | 1 | -33/+49 |
* | clk: tegra: fix pllre initilization | Peter De Schrijver | 2013-06-12 | 1 | -2/+1 |
* | clk: tegra: allow PLL m,n,p init from SoC files | Peter De Schrijver | 2013-06-12 | 1 | -27/+33 |
* | clk: tegra: pllc and pllxc should use pdiv_map | Peter De Schrijver | 2013-06-12 | 1 | -80/+82 |
* | clk: tegra: Add new fields and PLL types for Tegra114 | Peter De Schrijver | 2013-04-05 | 1 | -0/+839 |
* | clk: tegra: move from a lock bit idx to a lock mask | Peter De Schrijver | 2013-04-05 | 1 | -3/+3 |
* | clk: tegra: Add PLL post divider table | Peter De Schrijver | 2013-04-05 | 1 | -6/+32 |
* | clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE | Peter De Schrijver | 2013-04-05 | 1 | -0/+5 |
* | clk: tegra: Add TEGRA_PLL_BYPASS flag | Peter De Schrijver | 2013-04-05 | 1 | -4/+8 |
* | clk: tegra: Refactor PLL programming code | Peter De Schrijver | 2013-04-05 | 1 | -101/+161 |
* | clk: tegra: add Tegra specific clocks | Prashant Gaikwad | 2013-01-28 | 1 | -0/+648 |