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path: root/drivers/clk/tegra/clk-tegra210.c (follow)
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* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-301-179/+3
* clk: tegra: Micro-optimize Tegra210 clock setupThierry Reding2016-06-231-4/+4
* clk: tegra: Make sor_safe the parent of dpaux and dpaux1Thierry Reding2016-06-231-2/+2
* clk: tegra: Enable sor1 and sor1_src on Tegra210Thierry Reding2016-06-171-0/+2
* clk: tegra: Disable spread spectrum on pll_d2Thierry Reding2016-06-171-2/+3
* clk: tegra: Fixup post dividers on Tegra210Thierry Reding2016-06-101-47/+47
* remove lots of IS_ERR_VALUE abusesArnd Bergmann2016-05-281-1/+1
* clk: tegra: Fix pllre Tegra210 and add pll_re_out1Rhyland Klein2016-04-281-2/+14
* clk: tegra: Add sor_safe clockThierry Reding2016-04-281-0/+4
* clk: tegra: dpaux and dpaux1 are fixed factor clocksThierry Reding2016-04-281-0/+8
* clk: tegra: Add dpaux1 clockThierry Reding2016-04-281-0/+1
* clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLsAndrew Bresticker2016-04-281-0/+58
* clk: tegra: Fix sparse warnings for functions not declared as staticJon Hunter2016-02-021-17/+19
* clk: tegra: Fix sparse warning for pll_mJon Hunter2016-02-021-1/+1
* clk: tegra: Use definition for pll_u override bitJon Hunter2016-02-021-1/+1
* clk: tegra: Fix warning caused by pll_u failing to lockJon Hunter2016-02-021-2/+0
* clk: tegra: Fix clock sources for Tegra210 EMCJon Hunter2016-02-021-1/+2
* clk: tegra: Add the APB2APE audio clock on Tegra210Jon Hunter2016-02-021-0/+1
* clk: tegra: Fix pllx dyn step calculationRhyland Klein2016-02-021-5/+5
* clk: tegra: Fix naming of MISC registersRhyland Klein2016-02-021-18/+18
* clk: tegra: Remove improper flags for lock_enableRhyland Klein2016-01-251-28/+14
* clk: tegra: Add support for Tegra210 clocksRhyland Klein2015-12-171-0/+2852