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path: root/drivers/clk/tegra (follow)
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| * clk: tegra: use max divider if divider overflowsAndrew Bresticker2014-02-171-1/+1
| * clk: tegra: cclk_lp has a pllx/2 dividerAndrew Bresticker2014-02-171-1/+1
| * clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker2014-02-174-8/+16
| * clk: tegra: fix host1x clock on Tegra124Mark Zhang2014-02-171-1/+1
| * clk: tegra: PLLD2 fixes for hdmiDavid Ung2014-02-171-8/+7
| * clk: tegra: Fix PLLD mnp tableRhyland Klein2014-02-171-1/+10
| * clk: tegra: Fix PLLP rate tableGabe Black2014-02-171-5/+5
| * clk: tegra: Correct clock number for UARTEThierry Reding2014-02-171-1/+1
| * clk: tegra: Add missing Tegra20 fuse clksPeter De Schrijver2014-02-171-0/+2
* | clk: tegra: Staticize tegra_clk_periph_no_gate_opsSachin Kamat2014-02-231-1/+1
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* Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...Linus Torvalds2014-01-242-7/+7
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| * clk: tegra: Staticize tegra_clk_periph_nodiv_opsSachin Kamat2013-12-201-1/+1
| * clk: tegra: Staticize local variables in clk-pll.cSachin Kamat2013-12-201-6/+6
* | clk: tegra: remove bogus PCIE_XCLKStephen Warren2013-12-122-13/+0
* | clk: tegra: remove legacy reset APIsStephen Warren2013-12-123-63/+0
* | clk: tegra: implement a reset driverStephen Warren2013-12-126-6/+57
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* clk: tegra: fix __clk_lookup() return value checksWei Yongjun2013-11-281-4/+4
* clk: tegra: Do not print errors for clk_round_rate()Thierry Reding2013-11-281-6/+3
* clk: tegra: Initialize DSI low-power clocksThierry Reding2013-11-261-0/+2
* clk: tegra: add FUSE clock deviceAlexandre Courbot2013-11-264-1/+4
* clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding2013-11-261-1/+3
* clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding2013-11-261-0/+1
* clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen2013-11-261-0/+2
* clk: tegra124: add suspend/resume function for tegra_cpu_car_opsJoseph Lo2013-11-261-0/+27
* clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo2013-11-261-0/+26
* clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver2013-11-262-0/+1371
* clk: tegra124: Add new peripheral clocksPeter De Schrijver2013-11-261-0/+69
* clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver2013-11-261-0/+22
* clk: tegra: add TEGRA_PERIPH_NO_GATEPeter De Schrijver2013-11-263-3/+22
* clk: tegra: add locking to periph clksPeter De Schrijver2013-11-262-19/+24
* clk: tegra: Add periph regs bank XPeter De Schrijver2013-11-261-0/+10
* clk: tegra: Add support for PLLSSPeter De Schrijver2013-11-262-2/+126
* clk: tegra: move tegra20 to common infraPeter De Schrijver2013-11-261-402/+255
* clk: tegra: move tegra30 to common infraPeter De Schrijver2013-11-261-895/+403
* clk: tegra: introduce common gen4 super clockPeter De Schrijver2013-11-264-74/+155
* clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver2013-11-265-74/+253
* clk: tegra: move periph clocks to common filePeter De Schrijver2013-11-266-581/+627
* clk: tegra: move audio clk to common filePeter De Schrijver2013-11-264-208/+402
* clk: tegra: add clkdev registration infraPeter De Schrijver2013-11-263-159/+179
* clk: tegra: add common infra for DT clocksPeter De Schrijver2013-11-262-0/+16
* clk: tegra: add header for common tegra clock IDsPeter De Schrijver2013-11-261-0/+213
* clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver2013-11-265-177/+175
* clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver2013-11-262-4/+7
* clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver2013-11-262-93/+111
* clk: tegra: Add TEGRA_PERIPH_NO_DIV flagPeter De Schrijver2013-11-262-3/+9
* clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver2013-11-266-108/+85
* clk: tegra: simplify periph clock dataPeter De Schrijver2013-11-267-584/+464
* clk: tegra: Fix clock rate computationThierry Reding2013-11-261-0/+2
* clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding2013-11-261-4/+4
* clk: tegra: PLLE spread spectrum controlPeter De Schrijver2013-11-261-1/+29