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drivers
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clk
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zte
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Commit message (
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Author
Age
Files
Lines
*
clk: zx296718: export I2S mux clocks
Shawn Guo
2017-06-20
1
-4
/
+4
*
clk: zte: Mark pll config tables as const
Stephen Boyd
2017-04-12
1
-2
/
+2
*
clk: zte: add pll_vga clock for zx296718
Shawn Guo
2017-04-12
1
-0
/
+24
*
clk: zte: pd_bit is not 0 on zx296718
Shawn Guo
2017-04-12
2
-2
/
+16
*
clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocks
Shawn Guo
2017-04-12
1
-3
/
+3
*
clk: zte: add i2s clocks for zx296718
Baoyou Xie
2017-02-10
1
-0
/
+4
*
clk: zte: add audio clocks for zx296718
Jun Nie
2017-01-10
3
-0
/
+275
*
clk: zx296718: do not panic on failure
Shawn Guo
2017-01-10
1
-9
/
+18
*
clk: zx296718: register driver earlier with core_initcall
Shawn Guo
2016-09-23
1
-1
/
+5
*
clk: zx: fix pointer case warnings
Arnd Bergmann
2016-09-17
1
-10
/
+10
*
clk: zx296718: use builtin_platform_driver to simplify the code
Wei Yongjun
2016-09-17
1
-5
/
+1
*
clk: zx: register ZX296718 clocks
Jun Nie
2016-09-14
3
-0
/
+1050
*
clk: zx: reform pll config info to ease code extension
Jun Nie
2016-09-14
2
-9
/
+16
*
clk: zte: Remove CLK_IS_ROOT
Stephen Boyd
2016-04-16
1
-2
/
+1
*
clk: zx: Constify parent names in clock init data
Jun Nie
2015-07-28
1
-20
/
+20
*
clk: zx: Add audio and GPIO clock for zx296702
Jun Nie
2015-07-28
1
-2
/
+90
*
clk: zx: Add audio div clock method for zx296702
Jun Nie
2015-07-28
3
-3
/
+149
*
clk: zx: add clock support to zx296702
Jun Nie
2015-06-12
4
-0
/
+863