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path:
root
/
drivers
/
clk
/
zynqmp
/
pll.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate
Quanyang Wang
2022-08-31
1
-16
/
+15
*
clk: zynqmp: replace warn_once with pr_debug for failed clock ops
Michael Tretter
2022-01-25
1
-16
/
+16
*
clk: zynqmp: Use firmware specific common clock flags
Rajan Vaja
2021-06-29
1
-1
/
+3
*
clk: zynqmp: pll: Remove some dead code
Christophe JAILLET
2021-06-26
1
-2
/
+0
*
clk: zynqmp: fix compile testing without ZYNQMP_FIRMWARE
Michal Simek
2021-06-26
1
-6
/
+16
*
clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
Quanyang Wang
2021-04-08
1
-1
/
+11
*
clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
Quanyang Wang
2021-04-08
1
-6
/
+6
*
firmware: xilinx: Use APIs instead of IOCTLs
Rajan Vaja
2020-04-28
1
-10
/
+4
*
firmware: xilinx: Remove eemi ops for clock_getdivider
Rajan Vaja
2020-04-28
1
-1
/
+1
*
firmware: xilinx: Remove eemi ops for clock_setdivider
Rajan Vaja
2020-04-28
1
-2
/
+2
*
firmware: xilinx: Remove eemi ops for clock_getstate
Rajan Vaja
2020-04-28
1
-2
/
+1
*
firmware: xilinx: Remove eemi ops for clock_disable
Rajan Vaja
2020-04-28
1
-2
/
+1
*
firmware: xilinx: Remove eemi ops for clock_enable
Rajan Vaja
2020-04-28
1
-2
/
+1
*
clk: zynqmp: Warn user if clock user are more than allowed
Rajan Vaja
2020-01-23
1
-2
/
+4
*
drivers: clk: Add ZynqMP clock driver
Jolly Shah
2018-10-09
1
-0
/
+335