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2017-09-01clk: gate: expose clk_gate_ops::is_enabledGabriel Fernandez1-1/+2
2017-09-01clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()Gabriel Fernandez1-6/+6
2017-09-01clk: uniphier: add PXs3 clock dataMasahiro Yamada4-0/+46
2017-09-01clk: hi6220: change watchdog clock sourceLeo Yan1-3/+3
2017-09-01clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808Elaine Zhang1-2/+2
2017-08-31clk: cs2000: Add cs2000_set_saved_rateGaku Inami1-4/+10
2017-08-31clk: imx51: propagate rate across ipu_di*_selLucas Stach1-4/+4
2017-08-31clk: sunxi: fix uninitialized accessArnd Bergmann1-0/+4
2017-08-31clk: versatile: make clk_ops constBhumika Goyal1-1/+1
2017-08-31ARC: clk: introduce HSDK pll driverEugeniy Paltsev5-0/+473
2017-08-31clk: zte: constify clk_div_tableArvind Yadav1-3/+3
2017-08-31clk: imx: constify clk_div_tableArvind Yadav5-12/+12
2017-08-31clk: uniphier: add ethernet clock control supportKunihiko Hayashi1-0/+10
2017-08-31clk: gemini: hands off PCI OE bitLinus Walleij1-7/+0
2017-08-31clk: ux500: prcc: constify clk_ops.Arvind Yadav1-3/+3
2017-08-31clk: ux500: sysctrl: constify clk_ops.Arvind Yadav1-4/+4
2017-08-31clk: ux500: prcmu: constify clk_ops.Arvind Yadav1-7/+7
2017-08-24clk: sunxi-ng: Add sun4i/sun7i CCU driverPriit Laes7-0/+1853
2017-08-24dt-bindings: List devicetree binding for the CCU of Allwinner A10Priit Laes1-0/+1
2017-08-24dt-bindings: List devicetree binding for the CCU of Allwinner A20Priit Laes1-0/+1
2017-08-24clk: msm8996-gcc: add missing smmu clksSrinivas Kandagatla2-0/+30
2017-08-24clk: tegra: Fix Tegra210 PLLU initializationAlex Frid1-2/+4
2017-08-24clk: tegra: Correct Tegra210 UTMIPLL poweron delayAlex Frid1-3/+3
2017-08-24clk: tegra: Fix T210 PLLRE registrationAlex Frid1-20/+1
2017-08-24clk: tegra: Update T210 PLLSS (D2/DP) registrationAlex Frid1-39/+9
2017-08-24clk: tegra: Re-factor T210 PLLX registrationAlex Frid4-49/+10
2017-08-24clk: tegra: don't warn for pll_d2 defaults unnecessarilyPeter De Schrijver1-2/+4
2017-08-24clk: tegra: change post IDDQ release delay to 5usPeter De Schrijver1-1/+1
2017-08-24clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2CAlex Frid1-1/+2
2017-08-24clk: tegra: Fix T210 effective NDIV calculationAlex Frid1-4/+5
2017-08-24clk: tegra: Init cfg structure in _get_pll_mnpPeter De Schrijver1-0/+2
2017-08-24clk: tegra210: remove non-existing VFIR clockPeter De Schrijver1-1/+0
2017-08-24clk: tegra: disable SSC for PLL_D2Peter De Schrijver1-1/+1
2017-08-24clk: tegra: Enable PLL_SS for Tegra210Peter De Schrijver1-1/+1
2017-08-24clk: tegra: fix SS control on PLL enable/disablePeter De Schrijver1-20/+24
2017-08-24clk: qcom: msm8916: Fix bimc gpu clock opsGeorgi Djakov1-1/+1
2017-08-24clk: ti: make clk_ops constBhumika Goyal3-4/+4
2017-08-24clk: rockchip: Mark rockchip_fractional_approximation staticStephen Boyd1-1/+1
2017-08-22clk: rockchip: fix the rv1108 clk_mac sel register descriptionElaine Zhang1-1/+1
2017-08-22clk: rockchip: rename rv1108 macphy clock to macElaine Zhang2-9/+9
2017-08-22clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocksElaine Zhang1-0/+2
2017-08-22clk: rockchip: add rk3228 SCLK_SDIO_SRC clk idElaine Zhang1-1/+1
2017-08-22clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC IDElaine Zhang1-0/+2
2017-08-22clk: rockchip: add rk3228 sclk_sdio_src IDElaine Zhang1-0/+1
2017-08-19clk: sunxi-ng: support R40 SoCIcenowy Zheng6-0/+1682
2017-08-19dt-bindings: add compatible string for Allwinner R40 CCUIcenowy Zheng1-0/+1
2017-08-17clk: renesas: r8a7796: Add USB3.0 clockHiromitsu Yamasaki1-0/+1
2017-08-17clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHYYoshihiro Shimoda4-0/+249
2017-08-16clk: renesas: cpg-mssr: Add R8A77995 supportGeert Uytterhoeven6-1/+251
2017-08-16clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocksGeert Uytterhoeven2-1/+26