summaryrefslogtreecommitdiffstats
path: root/drivers/clk (follow)
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-04-176-0/+1048
|\
| * CLK: Pistachio: Register external clock gatesAndrew Bresticker2015-03-311-0/+21
| * CLK: Pistachio: Register system interface gate clocksAndrew Bresticker2015-03-311-0/+42
| * CLK: Pistachio: Register peripheral clocksAndrew Bresticker2015-03-311-0/+67
| * CLK: Pistachio: Register core clocksAndrew Bresticker2015-03-312-0/+200
| * CLK: Pistachio: Add PLL driverAndrew Bresticker2015-03-313-0/+452
| * CLK: Add basic infrastructure for Pistachio clocksAndrew Bresticker2015-03-314-0/+266
* | clk: bcm/kona: use DIV_ROUND_CLOSEST_ULL()Javi Merino2015-04-172-22/+7
|/
* Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2015-03-156-24/+59
|\
| * clk: introduce clk_is_matchMichael Turquette2015-03-111-0/+26
| * clk: don't export static symbolJulia Lawall2015-03-111-1/+0
| * clk: divider: fix calculation of initial best divider when rounding to closestUwe Kleine-König2015-03-091-6/+7
| * clk: divider: fix selection of divider when rounding to closestUwe Kleine-König2015-03-091-1/+5
| * clk: divider: fix calculation of maximal parent rate for a given dividerUwe Kleine-König2015-03-091-7/+1
| * clk: divider: return real rate instead of divider valueHeiko Stübner2015-03-061-1/+1
| * clk: qcom: fix platform_no_drv_owner.cocci warningskbuild test robot2015-02-251-1/+0
| * clk: qcom: fix platform_no_drv_owner.cocci warningskbuild test robot2015-02-251-1/+0
| * clk: qcom: Add PLL4 vote clockStephen Boyd2015-02-251-0/+13
| * clk: qcom: lcc-msm8960: Fix PLL rate detectionStephen Boyd2015-02-251-1/+1
| * clk: qcom: Fix slimbus n and m val offsetsStephen Boyd2015-02-251-2/+2
| * clk: ti: Fix FAPLL parent enable bit handlingTony Lindgren2015-02-251-3/+3
* | clk: at91: implement suspend/resume for the PMC irqchipBoris BREZILLON2015-03-042-1/+20
|/
* Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2015-02-2181-1191/+11680
|\
| * clk: Only recalculate the rate if neededTomeu Vizoso2015-02-201-1/+4
| * Revert "clk: mxs: Fix invalid 32-bit access to frac registers"Stefan Wahren2015-02-183-31/+18
| * clk: qoriq: Add support for the platform PLLEmil Medve2015-02-181-0/+83
| * clk: Replace explicit clk assignment with __clk_hw_set_clkJavier Martinez Canillas2015-02-185-35/+35
| * clk: Don't dereference parent clock if is NULLJavier Martinez Canillas2015-02-181-2/+2
| * clkdev: Always allocate a struct clk and call __clk_get() w/ CCFStephen Boyd2015-02-073-37/+59
| * clk: shmobile: div6: Avoid division by zero in .round_rate()Geert Uytterhoeven2015-02-041-0/+3
| * clk: mxs: Fix invalid 32-bit access to frac registersStefan Wahren2015-02-033-18/+31
| * clk: omap: compile legacy omap3 clocks conditionallyArnd Bergmann2015-02-036-2/+14
| * Merge tag 'tegra-clk-3.20' of git://nv-tegra.nvidia.com/user/pdeschrijver/lin...Michael Turquette2015-02-037-52/+172
| |\
| | * clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang2015-02-024-26/+24
| | * clk: tegra: Add support for the Tegra132 CAR IP blockPaul Walmsley2015-02-023-12/+129
| | * clk: tegra: make tegra_clocks_apply_init_table() arch_initcallPeter De Schrijver2015-02-021-2/+5
| | * clk: tegra: Fix order of arguments in WARNTomeu Vizoso2015-02-021-4/+4
| | * clk: tegra124: Add init data for dsi lp clocksSean Paul2015-02-021-0/+2
| | * clk: tegra: SDMMC controllers are on APBAndrew Bresticker2015-02-021-8/+8
| * | Merge tag 'v3.20-exynos-clk' of git://linuxtv.org/snawrocki/samsung into clk-...Michael Turquette2015-02-025-347/+112
| |\ \
| | * | clk: samsung: exynos4: Add divider clock id for memory bus frequencyChanwoo Choi2015-01-281-5/+5
| | * | clk: samsung: exynos4415: Use samsung_cmu_register_one() to simplify codeChanwoo Choi2014-12-231-168/+48
| | * | clk: samsung: exynos3250: Use samsung_cmu_register_one() to simplify codeChanwoo Choi2014-12-231-170/+47
| | * | clk: samsung: Change the return value of samsung_cmu_register_one()Chanwoo Choi2014-12-232-4/+12
| * | | clkdev: Export clk_register_clkdevTomeu Vizoso2015-02-021-0/+1
| * | | clk: Add rate constraints to clocksTomeu Vizoso2015-02-0212-58/+254
| * | | clk: remove clk-private.hMichael Turquette2015-02-021-2/+39
| * | | Merge branch 'clk-omap-legacy' into clk-nextMichael Turquette2015-02-0210-73/+5504
| |\ \ \
| | * | | clk: ti: add omap3 legacy clock dataTero Kristo2015-01-302-1/+4655
| | * | | clk: ti: composite: add support for legacy composite clock initTero Kristo2015-01-303-4/+46
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 09:00:28 +0100