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* clk: stm32mp1: add missing tzc2 clockGabriel Fernandez2018-04-061-3/+6
* clk: stm32mp1: fix SAI3 & SAI4 clocksGabriel Fernandez2018-04-061-2/+2
* clk: stm32mp1: remove unused dfsdm_src[] constGabriel Fernandez2018-04-061-4/+0
* clk: stm32mp1: add missing staticGabriel Fernandez2018-04-061-16/+14
* clk: stm32: add configuration flags for each of the stm32 driversBenjamin Gaignard2018-03-192-2/+16
* clk: stm32mp1: add Debug clocksGabriel Fernandez2018-03-111-0/+22
* clk: stm32mp1: add MCO clocksGabriel Fernandez2018-03-111-0/+20
* clk: stm32mp1: add RTC clockGabriel Fernandez2018-03-111-0/+15
* clk: stm32mp1: add Peripheral & Kernel ClocksGabriel Fernandez2018-03-111-27/+820
* clk: stm32mp1: add Kernel timersGabriel Fernandez2018-03-111-0/+185
* clk: stm32mp1: add Sub System clocksGabriel Fernandez2018-03-111-0/+85
* clk: stm32mp1: add Post-dividers for PLLGabriel Fernandez2018-03-111-0/+221
* clk: stm32mp1: add PLL clocksGabriel Fernandez2018-03-111-0/+209
* clk: stm32mp1: add Source Clocks for PLLsGabriel Fernandez2018-03-111-0/+60
* clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillatorsGabriel Fernandez2018-03-111-0/+143
* clk: stm32mp1: Introduce STM32MP1 clock driverGabriel Fernandez2018-03-113-0/+371
* Merge tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan...Linus Torvalds2018-02-075-18/+566
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| * clk: Add Ingenic jz4770 CGU driverPaul Cercueil2018-01-182-0/+484
| * clk: ingenic: Add code to enable/disable PLLsPaul Cercueil2018-01-181-15/+74
| * clk: ingenic: support PLLs with no bypass bitPaul Cercueil2018-01-182-1/+4
| * clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil2018-01-181-0/+2
| * clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil2018-01-182-2/+2
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-02-02105-5767/+11752
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| *-----. \ Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...Stephen Boyd2018-01-2715-104/+929
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| | | | | * | clk: sunxi-ng: a83t: Add M divider to TCON1 clockJernej Škrabec2018-01-031-2/+2
| | | | | * | clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCUIcenowy Zheng2017-12-291-3/+3
| | | | | * | clk: sunxi-ng: add support for Allwinner H3 DE2 CCUIcenowy Zheng2017-12-291-0/+47
| | | | | * | clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLLChen-Yu Tsai2017-12-081-1/+10
| | | | | * | clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLLChen-Yu Tsai2017-12-081-3/+6
| | | | | * | clk: sunxi-ng: Support fixed post-dividers on NM style clocksChen-Yu Tsai2017-12-082-13/+39
| | | | | * | clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocksChen-Yu Tsai2017-12-071-20/+37
| | | | | * | clk: sunxi-ng: Support fixed post-dividers on MP style clocksChen-Yu Tsai2017-12-072-2/+42
| | | | | * | clk: sunxi: Use PTR_ERR_OR_ZERO()Vasyl Gomonovych2017-11-301-4/+1
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| | | | * | clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being builtSean Wang2018-01-103-9/+2
| | | | * | clk: mediatek: Fix all warnings for missing struct clk_onecell_dataSean Wang2017-12-271-0/+1
| | | | * | clk: mediatek: fixup test-building of MediaTek clock driversSean Wang2017-12-221-1/+1
| | | | * | clk: mediatek: group drivers under indpendent menuSean Wang2017-12-221-46/+50
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| | | * / clk: fix reentrancy of clk_enable() on UP systemsDavid Lechner2018-01-101-1/+9
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| | * | clk: aspeed: Handle inverse polarity of USB port 1 clock gateBenjamin Herrenschmidt2018-01-271-3/+12
| | * | clk: aspeed: Fix return value check in aspeed_cc_init()Wei Yongjun2018-01-271-1/+1
| | * | clk: aspeed: Add reset controllerJoel Stanley2018-01-271-1/+81
| | * | clk: aspeed: Register gated clocksJoel Stanley2018-01-271-0/+130
| | * | clk: aspeed: Add platform driver and register PLLsJoel Stanley2018-01-271-0/+130
| | * | clk: aspeed: Register core clocksJoel Stanley2018-01-271-0/+177
| | * | clk: Add clock driver for ASPEED BMC SoCsJoel Stanley2018-01-273-0/+154
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| *-----. \ Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' an...Stephen Boyd2018-01-2721-163/+1276
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| | | | | * | clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()weiyongjun (A)2018-01-101-0/+2
| | | | | * | Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...Stephen Boyd2018-01-031-1/+1
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| | | | | | * | clk: meson: mpll: use 64-bit maths in params_from_rateMartin Blumenstingl2017-12-231-1/+1
| | | | | * | | clk: meson-axg: make local symbol axg_gp0_params_table staticweiyongjun (A)2017-12-281-1/+1
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