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| | | | * | clk: qcom: dispcc-sm8250: Disable EDP_GTC for sm8350Robert Foss2022-11-061-0/+3
| | | | * | clk: qcom: gcc-sm8250: Use retention mode for USB GDSCsManivannan Sadhasivam2022-11-061-2/+2
| | | | * | clk: qcom: dispcc-sm6350: Add CLK_OPS_PARENT_ENABLE to pixel&byte srcKonrad Dybcio2022-11-061-2/+2
| | | | * | clk: qcom: gcc-sm6125: Remove gpll7 from sdcc2_appsMartin Botka2022-11-061-1/+0
| | | | * | clk: qcom: gcc-ipq806x: use parent_data for the last remaining entryDmitry Baryshkov2022-11-061-1/+3
| | | * | | clk: Add trace events for rate requestsMaxime Ripard2022-12-071-0/+31
| | | * | | clk: Store clk_core for clk_rate_requestMaxime Ripard2022-12-071-0/+1
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| | * | | clk: mediatek: fix dependency of MT7986 ADC clocksDaniel Golle2022-11-291-1/+1
| | * | | clk: mediatek: Change PLL register API for MT8186Johnson Wang2022-11-292-3/+64
| | * | | clk: mediatek: Add new clock driver to handle FHCTL hardwareJohnson Wang2022-11-296-0/+635
| | * | | clk: mediatek: Export PLL operations symbolsJohnson Wang2022-11-292-50/+89
| | * | | clk: mediatek: mt8186-topckgen: Add GPU clock mux notifierAngeloGioacchino Del Regno2022-11-291-0/+27
| | * | | clk: mediatek: mt8186-mfg: Propagate rate changes to parentAngeloGioacchino Del Regno2022-11-291-2/+3
| | * | | clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-39/+39
| | * | | clk: mediatek: mt8192: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | * | | clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | * | | clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | * | | clk: mediatek: mt8183: Drop flags for sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | * | | clk: mediatek: mt8183: Compress top_divs array entriesAngeloGioacchino Del Regno2022-11-291-144/+72
| | * | | clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-31/+31
| | * | | clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocksAngeloGioacchino Del Regno2022-11-292-2/+7
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| *-----. \ \ Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into cl...Stephen Boyd2022-12-1225-182/+4006
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| | | | | * | | clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()Dario Binacchi2022-11-2513-55/+53
| | | | | * | | clk: imx8mn: fix imx8mn_enet_phy_sels clocks listDario Binacchi2022-11-251-2/+2
| | | | | * | | clk: imx8mn: fix imx8mn_sai2_sels clocks listDario Binacchi2022-11-251-1/+1
| | | | | * | | clk: imx: rename video_pll1 to video_pllDario Binacchi2022-11-251-48/+48
| | | | | * | | clk: imx: replace osc_hdmi with dummyDario Binacchi2022-11-251-6/+6
| | | | | * | | clk: imx8mn: rename vpu_pll to m7_alt_pllDario Binacchi2022-11-251-8/+8
| | | | | * | | clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gateGiulio Benetti2022-11-211-0/+1
| | | | | * | | clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsetsGiulio Benetti2022-11-211-1/+1
| | | | | * | | clk: imx8mp: Add audio shared gateAbel Vesa2022-11-211-1/+11
| | | | | * | | clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146xMarek Vasut2022-11-211-0/+2
| | | | | * | | clk: imx93: keep sys ctr clock always onJacky Bai2022-11-211-1/+2
| | | | | * | | clk: imx: keep hsio bus clock always onJacky Bai2022-11-211-1/+5
| | | | | * | | clk: imx93: drop tpm1/3, lpit1/2 clkPeng Fan2022-11-211-8/+4
| | | | | * | | clk: imx93: correct enet clockPeng Fan2022-11-211-1/+1
| | | | | * | | clk: imx93: unmap anatop base in error handling pathPeng Fan2022-11-211-6/+9
| | | | | * | | clk: imx: imx8mp: add shared clk gate for usb suspend clkLi Jun2022-11-211-1/+3
| | | | | * | | clk: imx93: correct the flexspi1 clock settingHaibo Chen2022-11-211-1/+1
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| | | | * | | clk: rockchip: Fix memory leak in rockchip_clk_register_pll()Xiu Jianfeng2022-11-231-0/+1
| | | | * | | clk: rockchip: add clock controller for the RK3588Elaine Zhang2022-11-155-1/+3447
| | | | * | | clk: rockchip: add lookup table supportSebastian Reichel2022-11-142-15/+40
| | | | * | | clk: rockchip: simplify rockchip_clk_add_lookupSebastian Reichel2022-11-142-10/+6
| | | | * | | clk: rockchip: allow additional mux options for cpu-clock frequency changesElaine Zhang2022-11-142-0/+43
| | | | * | | clk: rockchip: add pll type for RK3588Elaine Zhang2022-11-142-1/+235
| | | | * | | clk: rockchip: add register offset of the cores select parentElaine Zhang2022-11-142-8/+23
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| | | * | | clk: fractional-divider: Regroup inclusionsAndy Shevchenko2022-11-231-3/+4
| | | * | | clk: fractional-divider: Show numerator and denominator in debugfsAndy Shevchenko2022-11-231-0/+36
| | | * | | clk: fractional-divider: Split out clk_fd_get_div() helperAndy Shevchenko2022-11-231-6/+16
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| | * | | clk: spear: Fix SSP clock definition on SPEAr600Kory Maincent2022-11-231-3/+3
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