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path: root/drivers/clk (follow)
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* clk: samsung: Add CPU clock support for Exynos850Sam Protsenko2024-02-252-0/+181
* clk: samsung: Pass mask to wait_until_mux_stable()Sam Protsenko2024-02-251-7/+7
* clk: samsung: Keep register offsets in chip specific structureSam Protsenko2024-02-251-70/+86
* clk: samsung: Keep CPU clock chip specific data in a dedicated structSam Protsenko2024-02-251-14/+26
* clk: samsung: Pass register layout type explicitly to CLK_CPU()Sam Protsenko2024-02-258-17/+29
* clk: samsung: Pass actual CPU clock registers base to CPU_CLK()Sam Protsenko2024-02-256-39/+40
* clk: samsung: Group CPU clock functions by chipSam Protsenko2024-02-251-53/+61
* clk: samsung: Use single CPU clock notifier callback for all chipsSam Protsenko2024-02-251-35/+28
* clk: samsung: Reduce params count in exynos_register_cpu_clock()Sam Protsenko2024-02-251-23/+23
* clk: samsung: Pull struct exynos_cpuclk into clk-cpu.cSam Protsenko2024-02-252-35/+35
* clk: samsung: Improve clk-cpu.c styleSam Protsenko2024-02-251-32/+33
* clk: samsung: gs101: add support for cmu_peric1André Draszik2024-02-071-0/+346
* clk: samsung: gs101: drop extra empty lineAndré Draszik2024-02-071-1/+0
* clk: samsung: exynos850: Propagate SPI IPCLK rate changeSam Protsenko2024-02-011-16/+17
* clk: samsung: gs101: gpio_peric0_pclk needs to be kept onAndré Draszik2024-02-011-1/+1
* clk: samsung: exynos850: Add PDMA clocksSam Protsenko2024-01-231-1/+9
* clk: samsung: gs101: add support for cmu_peric0Tudor Ambarus2024-01-231-0/+583
* clk: samsung: gs101: register cmu_misc clocks earlyPeter Griffin2024-01-221-3/+9
* clk: samsung: clk-gs101: comply with the new dt cmu_misc clock namesTudor Ambarus2024-01-221-1/+1
* clk: qcom: gcc-x1e80100: Replace of_device.h with explicit includesStephen Rothwell2024-01-191-1/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2024-01-1271-637/+21379
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| * Merge branch 'clk-rs9' into clk-nextStephen Boyd2024-01-091-17/+20
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| | * clk: rs9: Add support for 9FGV0841Marek Vasut2023-12-181-0/+9
| | * clk: rs9: Replace model check with bitshift from chip dataMarek Vasut2023-12-181-17/+9
| | * clk: rs9: Limit check to vendor ID in VID registerMarek Vasut2023-12-181-0/+2
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| *---. \ Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-nextStephen Boyd2024-01-0913-292/+614
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| | | | * | clk: stm32mp1: use stm32mp13 reset driverGabriel Fernandez2023-12-187-128/+42
| | | | * | clk: stm32mp1: move stm32mp1 clock driver into stm32 directoryGabriel Fernandez2023-12-185-11/+31
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| | | * / clocking-wizard: Add support for versal clocking wizardShubhrajyoti Datta2023-12-171-92/+536
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| | * | drivers: clk: zynqmp: update divider round rate logicJay Buddhabhatti2023-12-171-61/+5
| | * | drivers: clk: zynqmp: calculate closest mux rateJay Buddhabhatti2023-12-171-1/+1
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| *-----. \ Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into c...Stephen Boyd2024-01-0937-106/+20433
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| | | | | * | clk: mediatek: add drivers for MT7988 SoCSam Shih2024-01-047-0/+960
| | | | | * | clk: mediatek: add pcw_chg_bit control for PLLs of MT7988Sam Shih2024-01-042-2/+4
| | | | | * | clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxesAngeloGioacchino Del Regno2024-01-041-13/+14
| | | | | * | clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxesAngeloGioacchino Del Regno2024-01-041-8/+19
| | | | | * | clk: mediatek: clk-mux: Support custom parent indices for muxesAngeloGioacchino Del Regno2024-01-042-4/+53
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| | | | * | clk: meson: g12a: add CSI & ISP gates clocksNeil Armstrong2023-11-241-0/+9
| | | | * | clk: meson: g12a: add MIPI ISP clocksNeil Armstrong2023-11-242-0/+67
| | | | * | clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocksNeil Armstrong2023-11-241-0/+40
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| | | * | clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL configKonrad Dybcio2023-12-191-0/+8
| | | * | clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL configKonrad Dybcio2023-12-191-0/+2
| | | * | clk: qcom: dispcc-sm8550: Use the correct PLL configuration functionKonrad Dybcio2023-12-191-2/+2
| | | * | clk: qcom: dispcc-sm8550: Update disp PLL settingsKonrad Dybcio2023-12-191-0/+8
| | | * | clk: qcom: gpucc-sm8550: Update GPU PLL settingsKonrad Dybcio2023-12-191-3/+3
| | | * | clk: qcom: gcc-sm8550: Mark RCGs shared where applicableKonrad Dybcio2023-12-191-43/+43
| | | * | clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCsKonrad Dybcio2023-12-191-0/+8
| | | * | clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votableKonrad Dybcio2023-12-191-4/+4
| | | * | clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flagKonrad Dybcio2023-12-191-8/+8
| | | * | clk: qcom: camcc-sc8280xp: Prevent error pointer dereferenceDan Carpenter2023-12-161-2/+3
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-10 03:40:06 +0100