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| | * | clk: ingenic: Use to_clk_info() macro for all clocksPaul Cercueil2020-10-141-39/+15
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| *---------. \ Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ...Stephen Boyd2020-10-209-68/+155
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| | | | | | | * | clk: mmp2: Fix the display clock divider baseLubomir Rintel2020-10-141-2/+2
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| | | | | | * / clk: pxa: Constify static struct clk_opsRikard Falkeborn2020-10-141-4/+4
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| | | | | * / clk: baikal-t1: Mark Ethernet PLL as criticalSerge Semin2020-10-141-6/+8
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| | | | * / clk: qoriq: modify MAX_PLL_DIV to 32Zhao Qiang2020-10-141-1/+1
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| | | * | clk: axi-clkgen: Set power bits for fractional modeLars-Peter Clausen2020-10-141-0/+7
| | | * | clk: axi-clkgen: Add support for fractional dividersLars-Peter Clausen2020-10-141-51/+129
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| | * | clk: meson: use semicolons rather than commas to separate statementsJulia Lawall2020-10-141-1/+1
| | * | clk: mvebu: ap80x-cpu: use semicolons rather than commas to separate statementsJulia Lawall2020-10-141-1/+1
| | * | clk: uniphier: use semicolons rather than commas to separate statementsJulia Lawall2020-10-142-2/+2
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| *-------. \ Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk...Stephen Boyd2020-10-2026-104/+1776
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| | | | | | * | clk: mediatek: Add MT8167 clock supportFabien Parent2020-10-148-0/+1505
| | | | | | * | clk: mediatek: add UART0 clock supportHanks Chen2020-10-081-0/+2
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| | | | | * | clk: rockchip: Initialize hw to error to avoid undefined behaviorStephen Boyd2020-10-081-1/+1
| | | | | * | clk: rockchip: rk3399: Support module buildElaine Zhang2020-09-222-1/+57
| | | | | * | clk: rockchip: fix the clk config to support module buildElaine Zhang2020-09-223-20/+101
| | | | | * | clk: rockchip: Export some clock common APIs for module driversElaine Zhang2020-09-221-22/+30
| | | | | * | clk: rockchip: Export rockchip_register_softrst()Elaine Zhang2020-09-221-3/+4
| | | | | * | clk: rockchip: Export rockchip_clk_register_ddrclk()Elaine Zhang2020-09-221-0/+1
| | | | | * | clk: rockchip: Use clk_hw_register_composite instead of clk_register_composit...Elaine Zhang2020-09-222-39/+40
| | | | | * | clk: rockchip: rk3308: drop unused mux_timer_src_pKrzysztof Kozlowski2020-09-221-1/+0
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| | | | * / clk: tegra: Drop !provider check in tegra210_clk_emc_set_rate()Stephen Boyd2020-09-241-1/+1
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| | | * | clk: ti: dra7: add missing clkctrl register for SHA2 instanceTero Kristo2020-09-221-0/+1
| | | * | clk: ti: clockdomain: fix static checker warningTero Kristo2020-09-221-0/+2
| | | * | clk: ti: autoidle: add checks against NULL pointer referenceTero Kristo2020-09-221-2/+12
| | | * | clk: keystone: sci-clk: add 10% slack to set_rateTero Kristo2020-09-221-1/+2
| | | * | clk: keystone: sci-clk: cache results of last query rate operationTero Kristo2020-09-221-0/+14
| | | * | clk: keystone: sci-clk: fix parsing assigned-clock data during probeTero Kristo2020-09-221-1/+1
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| | * | clk: mediatek: fix platform_no_drv_owner.cocci warningsZou Wei2020-09-221-1/+0
| | * | clk: mediatek: mt7629: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-7/+2
| | * | clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-6/+2
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| *-------. \ Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner', 'clk-samsung', ...Stephen Boyd2020-10-2027-134/+1942
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| | | | | | * | clk: socfpga: agilex: Remove unused variable 'cntr_mux'YueHaibing2020-09-221-13/+0
| | | | | | * | clk: si5341: drop unused 'err' variableKrzysztof Kozlowski2020-09-221-3/+1
| | | | | | * | clk: mmp: pxa1928: drop unused 'clk' variableKrzysztof Kozlowski2020-09-221-2/+1
| | | | | | * | clk: at91: drop unused at91sam9g45_pcr_layoutKrzysztof Kozlowski2020-09-221-7/+0
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| | | | | * | clk: davinci: add missing kerneldocKrzysztof Kozlowski2020-09-221-0/+1
| | | | | * | clk: fixed: add missing kerneldocKrzysztof Kozlowski2020-09-222-0/+2
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| | | | * | clk: s2mps11: initialize driver via module_platform_driverKrzysztof Kozlowski2020-09-221-12/+1
| | | | * | clk: samsung: Use cached clk_hws instead of __clk_lookup() callsSylwester Nawrocki2020-09-177-36/+42
| | | | * | clk: samsung: exynos5420/5250: Add IDs to the CPU parent clk definitionsSylwester Nawrocki2020-09-172-7/+8
| | | | * | clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocksSylwester Nawrocki2020-09-171-4/+6
| | | * | | clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLLJernej Skrabec2020-08-251-13/+24
| | | * | | clk: sunxi-ng: add support for the Allwinner A100 CCUYangtao Li2020-08-256-0/+1579
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| | * | | clk: meson: make shipped controller configurableJerome Brunet2020-09-101-9/+17
| | * | | clk: meson: g12a: mark fclk_div2 as criticalStefan Agner2020-08-291-0/+11
| | * | | clk: meson: axg-audio: fix g12a tdmout sclk inverterJerome Brunet2020-08-171-25/+60
| | * | | clk: meson: axg-audio: separate axg and g12a regmap tablesJerome Brunet2020-08-171-8/+127
| | * | | clk: meson: add sclk-ws driverJerome Brunet2020-08-172-0/+62
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