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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2022-10-08214-3761/+24667
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| *-----. Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' i...Stephen Boyd2022-10-0415-224/+2101
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| | | | | * clk: Renesas versaclock7 ccf device driverAlex Helms2022-10-013-0/+1321
| | | | * | clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975Matthias Fend2022-10-031-0/+11
| | | | * | clk: vc5: Use regmap_{set,clear}_bits() where appropriateLars-Peter Clausen2022-10-011-20/+15
| | | | * | clk: vc5: Check IO access resultsLars-Peter Clausen2022-10-011-50/+91
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| | | * | clk: bcm: rpi: Add support for VEC clockDom Cobley2022-09-301-0/+5
| | | * | clk: bcm: rpi: Handle pixel clock in firmwareIvan T. Ivanov2022-09-301-0/+3
| | | * | clk: bcm: rpi: Add support HEVC clockIvan T. Ivanov2022-09-301-0/+3
| | | * | clk: bcm2835: fix bcm2835_clock_rate_from_divisor declarationStefan Wahren2022-09-301-3/+3
| | | * | clk: bcm2835: Round UART input clock upIvan T. Ivanov2022-09-301-2/+33
| | | * | clk: bcm2835: Make peripheral PLLC criticalMaxime Ripard2022-09-301-1/+1
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| | * | clk: baikal-t1: Convert to platform device driverSerge Semin2022-09-304-54/+226
| | * | clk: baikal-t1: Add DDR/PCIe directly controlled resets supportSerge Semin2022-09-302-0/+76
| | * | clk: baikal-t1: Move reset-controls code into a dedicated moduleSerge Semin2022-09-307-105/+231
| | * | clk: baikal-t1: Add SATA internal ref clock bufferSerge Semin2022-09-303-1/+85
| | * | clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parentSerge Semin2022-09-303-3/+12
| | * | clk: baikal-t1: Fix invalid xGMAC PTP clock dividerSerge Semin2022-09-301-1/+1
| | * | clk: vc5: Fix 5P49V6901 outputs disabling when enabling FODSerge Semin2022-09-301-1/+1
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| *-----. \ Merge branches 'clk-fixed-rate', 'clk-spreadtrum', 'clk-pxa' and 'clk-ti' int...Stephen Boyd2022-10-049-55/+2331
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| | | | | * | clk: davinci: cfgchip: Use dev_err_probe() helperYang Yingliang2022-09-301-2/+1
| | | | | * | clk: davinci: pll: fix spelling typo in commentJiangshan Yi2022-09-301-1/+1
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| | | | * | clk: pxa: add a check for the return value of kzalloc()Xiaoke Wang2022-10-031-0/+2
| | | | * | clk: mmp: pxa168: control shared SDH bits with separate clockDoug Brown2022-09-301-4/+7
| | | | * | clk: mmp: pxa168: add clocks for SDH2 and SDH3Doug Brown2022-09-301-0/+6
| | | | * | clk: mmp: pxa168: fix GPIO clock enable bitsDoug Brown2022-09-301-1/+1
| | | | * | clk: mmp: pxa168: add muxes for more peripheralsDoug Brown2022-09-301-10/+32
| | | | * | clk: mmp: pxa168: fix incorrect parent clocksDoug Brown2022-09-301-6/+6
| | | | * | clk: mmp: pxa168: fix const-correctnessDoug Brown2022-09-301-7/+7
| | | | * | clk: mmp: pxa168: add new clocks for peripheralsDoug Brown2022-09-301-0/+3
| | | | * | clk: mmp: pxa168: fix incorrect dividersDoug Brown2022-09-301-2/+2
| | | | * | clk: mmp: pxa168: add additional register definesDoug Brown2022-09-301-7/+24
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| | | * / clk: sprd: Add clocks support for UMS512Cixi Geng2022-09-303-0/+2209
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| | * | clk: fixed-rate: add devm_clk_hw_register_fixed_rateDmitry Baryshkov2022-09-301-4/+24
| | * | clk: asm9260: use parent index to link the reference clockDmitry Baryshkov2022-09-301-17/+12
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| *-------. \ Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', 'clk-allwinner...Stephen Boyd2022-10-0425-255/+2163
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| | | | | | * | clk: imx: scu: fix memleak on platform_device_add() failsLin Yujun2022-10-011-1/+5
| | | | | | * | clk: imx93: add SAI IPG clkPeng Fan2022-09-191-3/+9
| | | | | | * | clk: imx93: add MU1/2 clockPeng Fan2022-09-191-2/+6
| | | | | | * | clk: imx93: switch to use new clk gate APIPeng Fan2022-09-191-4/+4
| | | | | | * | clk: imx: add i.MX93 clk gatePeng Fan2022-09-193-0/+204
| | | | | | * | clk: imx: clk-composite-93: check white_listPeng Fan2022-09-193-5/+10
| | | | | | * | clk: imx: clk-composite-93: check slice busyPeng Fan2022-09-191-3/+160
| | | | | | * | clk: imx8mp: tune the order of enet_qos_root_clkPeng Fan2022-09-021-1/+1
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| | | | | * | clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helperYang Yingliang2022-09-081-6/+3
| | | | | * | clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helperYang Yingliang2022-09-081-13/+6
| | | | | * | clk: sunxi-ng: sun8i-de2: Use dev_err_probe() helperYang Yingliang2022-09-081-19/+9
| | | | | * | clk: sunxi-ng: d1: Limit PLL rates to stable rangesSamuel Holland2022-08-251-0/+8
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| | | | * | clk: at91: sama5d2: Add Generic Clocks for UART/USARTSergiu Moga2022-09-151-0/+10
| | | | * | clk: microchip: add PolarFire SoC fabric clock supportConor Dooley2022-09-142-0/+291
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-19 23:50:58 +0100