summaryrefslogtreecommitdiffstats
path: root/drivers/clk (follow)
Commit message (Expand)AuthorAgeFilesLines
...
| | | * | | clk: ti: Preserve node in ti_dt_clocks_register()Tony Lindgren2022-03-111-5/+8
| | | * | | clk: ti: Constify clkctrl_nameTony Lindgren2022-03-111-1/+1
| | | |/ /
| | * | | clk: starfive: Add JH7100 audio clock driverEmil Renner Berthing2022-03-113-0/+179
| | * | | clk: starfive: jh7100: Support more clock typesEmil Renner Berthing2022-03-112-0/+41
| | * | | clk: starfive: jh7100: Make hw clock implementation reusableEmil Renner Berthing2022-03-112-89/+104
| | * | | clk: starfive: jh7100: Handle audio_div clock properlyEmil Renner Berthing2022-03-111-1/+67
| | * | | clk: starfive: jh7100: Don't round divisor up twiceEmil Renner Berthing2022-03-111-11/+3
| | |/ /
| | | |
| | \ \
| | \ \
| | \ \
| | \ \
| | \ \
| *-----. \ \ Merge branches 'clk-mvebu', 'clk-const', 'clk-imx' and 'clk-rockchip' into cl...Stephen Boyd2022-03-2927-221/+1320
| |\ \ \ \ \ \
| | | | | * | | clk: rockchip: re-add rational best approximation algorithm to the fractional...Quentin Schulz2022-02-241-0/+3
| | | | | * | | clk/rockchip: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)2022-02-231-4/+2
| | | | | * | | clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568Sascha Hauer2022-02-081-1/+1
| | | | | * | | clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568Sascha Hauer2022-02-081-3/+3
| | | | | * | | clk: rockchip: Add more PLL rates for rk3568Sascha Hauer2022-02-081-0/+6
| | | | | |/ /
| | | | * | | clk: imx: Select MXC_CLK for i.MX93 clock driverAbel Vesa2022-03-151-0/+1
| | | | * | | clk: imx: remove redundant re-assignment of pll->baseColin Ian King2022-03-091-1/+0
| | | | * | | clk: imx: pll14xx: Support dynamic ratesSascha Hauer2022-03-041-17/+126
| | | | * | | clk: imx: pll14xx: Add pr_fmtSascha Hauer2022-03-041-6/+6
| | | | * | | clk: imx: pll14xx: explicitly return lowest rateSascha Hauer2022-03-041-2/+2
| | | | * | | clk: imx: pll14xx: name variables after usageSascha Hauer2022-03-041-21/+21
| | | | * | | clk: imx: pll14xx: consolidate rate calculationSascha Hauer2022-03-041-33/+26
| | | | * | | clk: imx: pll14xx: Use FIELD_GET/FIELD_PREPSascha Hauer2022-03-041-21/+19
| | | | * | | clk: imx: pll14xx: Drop wrong shiftingSascha Hauer2022-03-041-2/+2
| | | | * | | clk: imx: pll14xx: Use register defines consistentlySascha Hauer2022-03-041-24/+25
| | | | * | | clk: imx8mp: remove SYS PLL 1/2 clock gatesPeng Fan2022-03-041-32/+16
| | | | * | | clk: imx8mn: remove SYS PLL 1/2 clock gatesPeng Fan2022-03-041-34/+16
| | | | * | | clk: imx8mm: remove SYS PLL 1/2 clock gatesPeng Fan2022-03-041-33/+16
| | | | * | | clk: imx: add i.MX93 clkPeng Fan2022-03-043-0/+349
| | | | * | | clk: imx: support fracn gppllPeng Fan2022-03-043-0/+345
| | | | * | | clk: imx: add i.MX93 composite clkPeng Fan2022-03-043-0/+103
| | | | * | | clk: imx: off by one in imx_lpcg_parse_clks_from_dt()Dan Carpenter2022-03-041-1/+1
| | | | * | | clk: imx7d: Remove audio_mclk_root_clkAbel Vesa2022-03-041-1/+0
| | | | * | | clk: imx8mp: Add missing IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT clockLaurent Pinchart2022-02-211-0/+1
| | | | * | | clk: imx: Add imx8dxl clk driverJacky Bai2022-01-294-1/+70
| | | | * | | clk: imx: Add initial support for i.MXRT1050 clock driverJesse Taube2022-01-293-0/+176
| | | | |/ /
| | | * | | clk: Mark clk_core_evict_parent_cache_subtree() 'target' constStephen Boyd2022-02-261-1/+1
| | | * | | clk: Mark 'all_lists' as constStephen Boyd2022-02-261-2/+2
| | | * | | clk: pistachio: Declare mux table as const u32[]Jonathan Neuschäfer2022-02-261-1/+1
| | | * | | clk: qcom: Declare mux table as const u32[]Jonathan Neuschäfer2022-02-261-1/+1
| | | * | | clk: mmp: Declare mux tables as const u32[]Jonathan Neuschäfer2022-02-261-2/+2
| | | * | | clk: hisilicon: Remove unnecessary cast of mux table to u32 *Jonathan Neuschäfer2022-02-261-1/+1
| | | * | | clk: mux: Declare u32 *table parameter as constJonathan Neuschäfer2022-02-261-5/+5
| | | * | | clk: nxp: Declare mux table parameter as const u32 *Jonathan Neuschäfer2022-02-261-1/+1
| | | * | | clk: nxp: Remove unused variableJonathan Neuschäfer2022-02-261-2/+1
| | | |/ /
| | * / / clk: mvebu: use time_is_before_eq_jiffies() instead of open coding itWang Qing2022-02-171-1/+2
| | |/ /
| | | |
| | \ \
| | \ \
| | \ \
| | \ \
| | \ \
| *-----. \ \ Merge branches 'clk-xilinx', 'clk-kunit', 'clk-cs2000' and 'clk-renesas' into...Stephen Boyd2022-03-2920-309/+1290
| |\ \ \ \ \ \ | | | | |_|_|/ | | | |/| | |
| | | | | * | clk: rs9: Add Renesas 9-series PCIe clock generator driverMarek Vasut2022-03-183-0/+332
| | | | | * | clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()Marek Vasut2022-03-181-0/+22
| | | | | * | clk: renesas: r8a779f0: Add PFC clockGeert Uytterhoeven2022-02-221-0/+1
| | | | | * | clk: renesas: r8a779f0: Add I2C clocksGeert Uytterhoeven2022-02-221-0/+6
| | | | | * | clk: renesas: r8a779f0: Add WDT clockGeert Uytterhoeven2022-02-221-0/+9
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-26 21:34:04 +0100