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* clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfigDaniel Lezcano2015-02-251-11/+5
| | | | | | | | | | | | | | | | The Kconfig options for the asm9260 timer is wrong as it can be selected by another platform with allyes config and thus leading to a compilation failure as some non arch related code is pulled by the compilation. Fix this by having the platform Kconfig to select the timer as it is done for the others drivers. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Oleksij Rempel <linux@rempel-privat.de> Conflicts: drivers/clocksource/Kconfig
* Merge tag 'soc-for-linus' of ↵Linus Torvalds2015-02-171-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "New and updated SoC support. Also included are some cleanups where the platform maintainers hadn't separated cleanups from new developent in separate branches. Some of the larger things worth pointing out: - A large set of changes from Alexandre Belloni and Nicolas Ferre preparing at91 platforms for multiplatform and cleaning up quite a bit in the process. - Removal of CSR's "Marco" SoC platform that never made it out to the market. We love seeing these since it means the vendor published support before product was out, which is exactly what we want! New platforms this release are: - Conexant Digicolor (CX92755 SoC) - Hisilicon HiP01 SoC - CSR/sirf Atlas7 SoC - ST STiH418 SoC - Common code changes for Nvidia Tegra132 (64-bit SoC) We're seeing more and more platforms having a harder time labelling changes as cleanups vs new development -- which is a good sign that we've come quite far on the cleanup effort. So over time we might start combining the cleanup and new-development branches more" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits) ARM: at91/trivial: unify functions and machine names ARM: at91: remove at91_dt_initialize and machine init_early() ARM: at91: change board files into SoC files ARM: at91: remove at91_boot_soc ARM: at91: move alternative initial mapping to board-dt-sama5.c ARM: at91: merge all SOC_AT91SAM9xxx ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init() ARM: digicolor: select syscon and timer ARM: zynq: Simplify SLCR initialization ARM: zynq: PM: Fixed simple typo. ARM: zynq: Setup default gpio number for Xilinx Zynq ARM: digicolor: add low level debug support ARM: initial support for Conexant Digicolor CX92755 SoC ARM: OMAP2+: Add dm816x hwmod support ARM: OMAP2+: Add clock domain support for dm816x ARM: OMAP2+: Add board-generic.c entry for ti81xx ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage ARM: at91: remove unused mach/system_rev.h ARM: at91: stop using HAVE_AT91_DBGUx ARM: at91: fix ordering of SRAM and PM initialization ...
| * clocksource: Build Tegra timer on 32-bit ARM onlyThierry Reding2015-01-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2015-02-171-0/+17
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull clocksource updates from Ingo Molnar: "The main change in this tree is the addition of various new SoC clocksource/clockevents drivers: Conexant Digicolor SoCs, rockchip rk3288 board, asm9260 for MIPS and versatile AB/PB boards" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dts: versatile: Add sysregs node clocksource: versatile: Adapt for Versatile AB and PB boards dt/bindings: Add binding for Versatile system registers clocksource: Driver for Conexant Digicolor SoC timer clocksource: devicetree: Document Conexant Digicolor timer binding clockevents: rockchip: Add rockchip timer for rk3288 ARM: clocksource: Add asm9260_timer driver clocksource: marco: Rename marco to atlas7 clocksource: sirf: Remove unused variable
| * | clocksource: Driver for Conexant Digicolor SoC timerBaruch Siach2015-01-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocksource driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Hardware provides 8 timers, A to H. Timer A is dedicated to a future watchdog driver so we don't use it here. Use timer B for sched_clock, and timer C for clock_event. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * | clockevents: rockchip: Add rockchip timer for rk3288Daniel Lezcano2015-01-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
| * | ARM: clocksource: Add asm9260_timer driverOleksij Rempel2015-01-291-0/+10
| |/ | | | | | | | | | | | | | | | | In some cases asm9260 looks similar to iMX2x. One of exceptions is timer controller. So this patch introduces new driver for this special case. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* / ARM: 8251/1: clocksource: enable pxa_timer for SA-1100 platformDmitry Eremin-Solenikov2015-01-141-0/+7
|/ | | | | | | | | | SA-11x0 platform used the same IP block as was used on PXA. Consequently it makes sense to have only one driver. Enable pxa_timer clocksource for StrongARM platform. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-121-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This is an unusually large pull request for MIPS - in parts because lots of patches missed the 3.18 deadline but primarily because some folks opened the flood gates. - Retire the MIPS-specific phys_t with the generic phys_addr_t. - Improvments for the backtrace code used by oprofile. - Better backtraces on SMP systems. - Cleanups for the Octeon platform code. - Cleanups and fixes for the Loongson platform code. - Cleanups and fixes to the firmware library. - Switch ATH79 platform to use the firmware library. - Grand overhault to the SEAD3 and Malta interrupt code. - Move the GIC interrupt code to drivers/irqchip - Lots of GIC cleanups and updates to the GIC code to use modern IRQ infrastructures and features of the kernel. - OF documentation updates for the GIC bindings - Move GIC clocksource driver to drivers/clocksource - Merge GIC clocksource driver with clockevent driver. - Further updates to bring the GIC clocksource driver up to date. - R3000 TLB code cleanups - Improvments to the Loongson 3 platform code. - Convert pr_warning to pr_warn. - Merge a bunch of small lantiq and ralink fixes that have been staged/lingering inside the openwrt tree for a while. - Update archhelp for IP22/IP32 - Fix a number of issues for Loongson 1B. - New clocksource and clockevent driver for Loongson 1B. - Further work on clk handling for Loongson 1B. - Platform work for Broadcom BMIPS. - Error handling cleanups for TurboChannel. - Fixes and optimization to the microMIPS support. - Option to disable the FTLB. - Dump more relevant information on machine check exception - Change binfmt to allow arch to examine PT_*PROC headers - Support for new style FPU register model in O32 - VDSO randomization. - BCM47xx cleanups - BCM47xx reimplement the way the kernel accesses NVRAM information. - Random cleanups - Add support for ATH25 platforms - Remove pointless locking code in some PCI platforms. - Some improvments to EVA support - Minor Alchemy cleanup" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits) MIPS: Add MFHC0 and MTHC0 instructions to uasm. MIPS: Cosmetic cleanups of page table headers. MIPS: Add CP0 macros for extended EntryLo registers MIPS: Remove now unused definition of phys_t. MIPS: Replace use of phys_t with phys_addr_t. MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig. MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO MIPS: <asm/types.h> fix indentation. MAINTAINERS: Add entry for BMIPS multiplatform kernel MIPS: Enable VDSO randomization MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration MIPS: Remove declaration of obsolete arch_init_clk_ops() MIPS: atomic.h: Reformat to fit in 79 columns MIPS: Apply `.insn' to fixup labels throughout MIPS: Fix microMIPS LL/SC immediate offsets MIPS: Kconfig: Only allow 32-bit microMIPS builds MIPS: signal.c: Fix an invalid cast in ISA mode bit handling MIPS: mm: Only build one microassembler that is suitable ...
| * clocksource: mips-gic: Add device-tree supportAndrew Bresticker2014-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parse the GIC timer frequency and interrupt from the device-tree. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8421/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Move GIC clocksource driver to drivers/clocksource/Andrew Bresticker2014-11-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | clocksource: meson6: Select CLKSRC_MMIOBeniamino Galvani2014-11-181-0/+1
|/ | | | | | | | Select CLKSRC_MMIO when the meson6_timer driver is enabled since it depends on clocksource MMIO functions. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Carlo Caione <carlo@caione.org>
* Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2014-10-091-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer updates from Thomas Gleixner: "Nothing really exciting this time: - a few fixlets in the NOHZ code - a new ARM SoC timer abomination. One should expect that we have enough of them already, but they insist on inventing new ones. - the usual bunch of ARM SoC timer updates. That feels like herding cats" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: arm_arch_timer: Consolidate arch_timer_evtstrm_enable clocksource: arm_arch_timer: Enable counter access for 32-bit ARM clocksource: arm_arch_timer: Change clocksource name if CP15 unavailable clocksource: sirf: Disable counter before re-setting it clocksource: cadence_ttc: Add support for 32bit mode clocksource: tcb_clksrc: Sanitize IRQ request clocksource: arm_arch_timer: Discard unavailable timers correctly clocksource: vf_pit_timer: Support shutdown mode ARM: meson6: clocksource: Add Meson6 timer support ARM: meson: documentation: Add timer documentation clocksource: sh_tmu: Document r8a7779 binding clocksource: sh_mtu2: Document r7s72100 binding clocksource: sh_cmt: Document SoC specific bindings timerfd: Remove an always true check nohz: Avoid tick's double reprogramming in highres mode nohz: Fix spurious periodic tick behaviour in low-res dynticks mode
| * ARM: meson6: clocksource: Add Meson6 timer supportCarlo Caione2014-09-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
* | ARM: at91: PIT: Move the driver to drivers/clocksourceMaxime Ripard2014-09-151-0/+4
|/ | | | | | | | | | | | | | | Now that we don't depend on anyting in the mach-at91 directory, we can just move the driver to where it belongs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Conflicts: arch/arm/mach-at91/Kconfig arch/arm/mach-at91/Makefile
* clocksource: exynos_mct: Only use 32-bits where possibleDoug Anderson2014-07-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MCT has a nice 64-bit counter. That means that we _can_ register as a 64-bit clocksource and sched_clock. ...but that doesn't mean we should. The 64-bit counter is read by reading two 32-bit registers. That means reading needs to be something like: - Read upper half - Read lower half - Read upper half and confirm that it hasn't changed. That wouldn't be terrible, but: - THe MCT isn't very fast to access (hundreds of nanoseconds). - The clocksource is queried _all the time_. In total system profiles of real workloads on ChromeOS, we've seen exynos_frc_read() taking 2% or more of CPU time even after optimizing the 3 reads above to 2 (see below). The MCT is clocked at ~24MHz on all known systems. That means that the 32-bit half of the counter rolls over every ~178 seconds. This inspired an optimization in ChromeOS to cache the upper half between calls, moving 3 reads to 2. ...but we can do better! Having a 32-bit timer that flips every 178 seconds is more than sufficient for Linux. Let's just use the lower half of the MCT. Times on 5420 to do 1000000 gettimeofday() calls from userspace: * Original code: 1323852 us * ChromeOS cache upper half: 1173084 us * ChromeOS + ldmia to optimize: 1045674 us * Use lower 32-bit only (this code): 1014429 us As you can see, the time used doesn't increase linearly with the number of reads and we can make 64-bit work almost as fast as 32-bit with a bit of assembly code. But since there's no real gain for 64-bit, let's go with the simplest and fastest implementation. Note: with this change roughly half the time for gettimeofday() is spent in exynos_frc_read(). The rest is timer / system call overhead. Also note: this patch disables the use of the MCT on ARM64 systems until we've sorted out how to make "cycles_t" always 32-bit. Really ARM64 systems should be using arch timers anyway. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: Kconfig: Let EM_TIMER_STI depend on HAS_IOMEMChen Gang2014-07-231-1/+1
| | | | | | | | | | | | | | In 'em_sti.c', it will call devm_ioremap_resource() which need HAS_IOMEM. So need let EM_TIMER_STI depend on HAS_IOMEM, too. The related error (with allmodconfig under score): LD init/built-in.o em_sti.c:(.text.em_sti_probe+0x84): undefined reference to `devm_ioremap_resource' make: *** [vmlinux] Error 1 Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: Add support for the Mediatek SoCsMatthias Brugger2014-07-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sh_mtu2: Tidy up Kconfig typo for MTU2Kuninori Morimoto2014-07-231-1/+1
| | | | | | | | | It should be "MTU2" instead of "TMU2" Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: Add a Kconfig menuJean Delvare2014-06-211-0/+4
| | | | | | | | | | Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2014-06-051-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next Pull timer core updates from Thomas Gleixner: "This time you get nothing really exciting: - A huge update to the sh* clocksource drivers - Support for two more ARM SoCs - Removal of the deprecated setup_sched_clock() API - The usual pile of fixlets all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits) clocksource: Add Freescale FlexTimer Module (FTM) timer support ARM: dts: vf610: Add Freescale FlexTimer Module timer node. clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree Documentation clocksource: sh_tmu: Remove unnecessary OOM messages clocksource: sh_mtu2: Remove unnecessary OOM messages clocksource: sh_cmt: Remove unnecessary OOM messages clocksource: em_sti: Remove unnecessary OOM messages clocksource: dw_apb_timer_of: Do not trace read_sched_clock clocksource: Fix clocksource_mmio_readX_down clocksource: Fix type confusion for clocksource_mmio_readX_Y clocksource: sh_tmu: Fix channel IRQ retrieval in legacy case clocksource: qcom: Implement read_current_timer for udelay ntp: Make is_error_status() use its argument ntp: Convert simple_strtol to kstrtol timer_stats/doc: Fix /proc/timer_stats documentation sched_clock: Remove deprecated setup_sched_clock() API ARM: sun6i: a31: Add support for the High Speed Timers clocksource: sun5i: Add support for reset controller clocksource: efm32: use $vendor,$device scheme for compatible string KConfig: Vexpress: build the ARM_GLOBAL_TIMER with vexpress platform ...
| * clocksource: Add Freescale FlexTimer Module (FTM) timer supportXiubo Li2014-05-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale FlexTimer Module time reference is a 16-bit counter that can be used as an unsigned or signed increase counter. CNTIN defines the starting value of the count and MOD defines the final value of the count. The value of CNTIN is loaded into the FTM counter, and the counter increments until the value of MOD is reached, at which point the counter is reloaded with the value of CNTIN. That's also when an overflow interrupt will be generated. Here using the 'evt' prefix or postfix as clock event device and the 'src' as clock source device. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | ARM: vexpress: refine dependencies for new codeArnd Bergmann2014-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The versatile express changes for 3.16 introduced a number of build regressions for randconfig kernels by not tracking dependencies between the components right. This patch tries to rectify that: * the mach-vexpress code cannot link without the syscfg driver, which in turn needs MFD_VEXPRESS_SYSREG * various drivers call devm_regmap_init_vexpress_config(), which has to be exported so it can be used by loadable modules * the configuration bus uses OF DT helper functions that are not available to platforms disable CONFIG_OF * The sysreg driver exports GPIOs through gpiolib, which can be disabled on some platforms. * The clocksource code cannot be built on platforms that don't use modern timekeeping but rely on gettimeoffset. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | clocksource: Sched clock source for Versatile ExpressPawel Moll2014-05-151-0/+11
|/ | | | | | | | | | | | This patch adds a trival sched clock source using free running, 24MHz clocked counter present in the ARM Ltd. reference platforms (Versatile, RealView, Versatile Express) System Registers block. This code replaces the call in the VE machine code. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'cleanup-3.15' of ↵Linus Torvalds2014-04-051-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "These cleanup patches are mainly move stuff around and should all be harmless. They are mainly split out so that other branches can be based on top to avoid conflicts. Notable changes are: - We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no longer used (Uwe Kleine-König) - The Qualcomm MSM platform is split out into legacy mach-msm and new-style mach-qcom, to allow easier maintainance of the new hardware support without regressions (Kumar Gala) - A rework of some of the Kconfig logic to simplify multiplatform support (Rob Herring) - Samsung Exynos gets closer to supporting multiplatform (Sachin Kamat and others) - mach-bcm3528 gets merged into mach-bcm (Stephen Warren) - at91 gains some common clock framework support (Alexandre Belloni, Jean-Jacques Hiblot and other French people)" * tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits) ARM: hisi: select HAVE_ARM_SCU only for SMP ARM: efm32: allow uncompress debug output ARM: prima2: build reset code standalone ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ...
| * clocksource: qcom: Move clocksource code out of mach-msmKumar Gala2014-02-051-0/+3
| | | | | | | | | | | | | | | | We intend to share the clocksource code for MSM platforms between legacy and multiplatform supported qcom SoCs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* | clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTSGeert Uytterhoeven2014-03-221-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If GENERIC_CLOCKEVENTS=n: drivers/clocksource/sh_cmt.c:54:28: error: field 'ced' has incomplete type drivers/clocksource/sh_cmt.c: In function 'sh_cmt_interrupt': drivers/clocksource/sh_cmt.c:407:23: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/sh_mtu2.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/sh_mtu2.c: In function 'ced_to_sh_mtu2': drivers/clocksource/sh_mtu2.c:184:70: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/sh_mtu2.c: At top level: drivers/clocksource/sh_mtu2.c:188:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] drivers/clocksource/sh_tmu.c:45:28: error: field 'ced' has incomplete type drivers/clocksource/sh_tmu.c: In function 'sh_tmu_interrupt': drivers/clocksource/sh_tmu.c:207:21: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/em_sti.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/em_sti.c: In function 'ced_to_em_sti': drivers/clocksource/em_sti.c:251:69: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/em_sti.c: At top level: drivers/clocksource/em_sti.c:255:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Magnus Damm <damm@opensource.se> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1395324352-9146-1-git-send-email-geert@linux-m68k.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | clocksource: Add Kconfig entries for CMT, MTU2, TMU and STIMagnus Damm2014-03-111-0/+44
|/ | | | | | | | | | | Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* Merge branch 'clockevents/3.14' of ↵Ingo Molnar2014-01-141-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clocksource/clockevent updates from Daniel Lezcano: * Axel Lin removed an unused structure defining the ids for the bcm kona driver. * Ezequiel Garcia enabled the timer divider only when the 25MHz timer is not used for the armada 370 XP. * Jingoo Han removed a pointless platform data initialization for the sh_mtu and sh_mtu2. * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt. * Linus Walleij added a useful warning in clk_of when no clocks are found while the old behavior was to silently hang at boot time. * Maxime Ripard added the high speed timer drivers for the Allwinner SoCs (A10, A13, A20). He increased the rating, shared the irq across all available cpus and fixed the clockevent's irq initialization for the sun4i. * Michael Opdenacker removed the usage of the IRQF_DISABLED for the all the timers driver located in drivers/clocksource. * Stephen Boyd switched to sched_clock_register for the arm_global_timer, cadence_ttc, sun4i and orion timers. Conflicts: drivers/clocksource/clksrc-of.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
| * clocksource: Add Allwinner SoCs HS timers driverMaxime Ripard2013-12-111-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the Allwinner SoCs (at this time, all but the A10) also have a High Speed timers that are not using the 24MHz oscillator as a source but rather the AHB clock running much faster. The IP is slightly different between the A10s/A13 and the one used in the A20/A31, since the latter have 4 timers available, while the former have only 2 of them. [dlezcano] : Fixed conflict with b788beda "Order Kconfig options alphabetically" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | clocksource: time-efm32: Select CLKSRC_MMIOAxel Lin2013-12-101-0/+1
| | | | | | | | | | | | | | | | | | The time-efm32 driver uses the clocksource MMIO functions. Thus it needs to select CLKSRC_MMIO in Kconfig. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* | clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARMStephen Boyd2013-11-211-0/+1
|/ | | | | | | | | | | | Pavel Machek reports that this config is exposed on x86 where the ARM architected timers aren't even present. Make it depend on the ARM architected timers being selected so that non-ARM builds aren't asked about it. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sun4i: Select CLKSRC_MMIOMaxime Ripard2013-10-221-0/+1
| | | | | | | | The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: Provide timekeeping for efm32 SoCsUwe Kleine-König2013-10-221-0/+8
| | | | | | | | | An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* Merge branch 'timer_evtstrm' of git://linux-arm.org/linux-skn into ↵Daniel Lezcano2013-10-031-0/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | clockevents/3.13 Adds support to configure the rate and enable the event stream for architected timer. The event streams can be used to impose a timeout on a wfe, to safeguard against any programming error in case an expected event is not generated or even to implement wfe-based timeouts for userspace locking implementations. This feature can be disabled(enabled by default). Since the timer control register is reset to zero on warm boot, CPU PM notifier is added to save and restore the value. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * drivers: clocksource: add support for ARM architected timer event streamWill Deacon2013-09-261-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Will Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
* | arm: clocksource: mvebu: Use the main timer as clock source from DTJean Pihet2013-09-261-0/+1
|/ | | | | | | | | | | | | | | | This commit: 573145f08c2b92c45498468afbbba909f6ce6135 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE replaced a call to the driver's timer initialization by a call to clocksource_of_init(). However, it failed to select CONFIG_CLKSRC_OF. Fix this by selecting CONFIG_CLKSRC_OF for Armada370/XP machines. Without this change the kernel is stuck at: 'Calibrating delay loop...'. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: samsung_pwm_timer: Do not use clocksource_mmioTomasz Figa2013-08-061-1/+0
| | | | | | | | | | | | | In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* Merge branch 'timers/clockevents' of ↵Thomas Gleixner2013-07-121-0/+18
|\ | | | | | | | | | | git://git.linaro.org/people/dlezcano/clockevents into timers/urgent * New clocksource drivers for ARM SoCs to share
| * clocksource: arm_global_timer: Add ARM global timer supportStuart Menefy2013-07-031-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * clocksource: Add Marvell Orion SoC timerSebastian Hesselbarth2013-07-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
* | Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2013-07-061-0/+5
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer core updates from Thomas Gleixner: "The timer changes contain: - posix timer code consolidation and fixes for odd corner cases - sched_clock implementation moved from ARM to core code to avoid duplication by other architectures - alarm timer updates - clocksource and clockevents unregistration facilities - clocksource/events support for new hardware - precise nanoseconds RTC readout (Xen feature) - generic support for Xen suspend/resume oddities - the usual lot of fixes and cleanups all over the place The parts which touch other areas (ARM/XEN) have been coordinated with the relevant maintainers. Though this results in an handful of trivial to solve merge conflicts, which we preferred over nasty cross tree merge dependencies. The patches which have been committed in the last few days are bug fixes plus the posix timer lot. The latter was in akpms queue and next for quite some time; they just got forgotten and Frederic collected them last minute." * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) hrtimer: Remove unused variable hrtimers: Move SMP function call to thread context clocksource: Reselect clocksource when watchdog validated high-res capability posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting posix_timers: fix racy timer delta caching on task exit posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule() selftests: add basic posix timers selftests posix_cpu_timers: consolidate expired timers check posix_cpu_timers: consolidate timer list cleanups posix_cpu_timer: consolidate expiry time type tick: Sanitize broadcast control logic tick: Prevent uncontrolled switch to oneshot mode tick: Make oneshot broadcast robust vs. CPU offlining x86: xen: Sync the CMOS RTC as well as the Xen wallclock x86: xen: Sync the wallclock when the system time is set timekeeping: Indicate that clock was set in the pvclock gtod notifier timekeeping: Pass flags instead of multiple bools to timekeeping_update() xen: Remove clock_was_set() call in the resume path hrtimers: Support resuming with two or more CPUs online (but stopped) timer: Fix jiffies wrap behavior of round_jiffies_common() ...
| * clocksource: Add Freescale Vybrid pit timer supportJingchang Lu2013-06-061-0/+5
| | | | | | | | | | | | | | | | | | Add Freescale Vybrid Family period interrupt timer support. Signed-off-by: Jingchang Lu <b35083@freescale.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | clocksource: dw_apb_timer_of: use clocksource_of_initHeiko Stuebner2013-06-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* | clocksource: dw_apb_timer_of: select DW_APB_TIMERHeiko Stuebner2013-06-121-0/+1
|/ | | | | | | | | | | | | | | dw_apb_timer_of is the driver part facing devicetree platforms and calls into dw_apb_timer with the data gathered from the dt. Currently the two platforms using the dw_apb_timer_of select both the options for the core timer and the dt addon. As dw_apb_timer_of always depends on dw_apb_timer let it select DW_APB_TIMER itself without the need for every platform to do it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* Merge tag 'multiplatform-for-linus-2' of ↵Linus Torvalds2013-05-071-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull late ARM Exynos multiplatform changes from Arnd Bergmann: "These continue the multiplatform support for exynos, adding support for building most of the essential drivers (clocksource, clk, irqchip) when combined with other platforms. As a result, it should become really easy to add full multiplatform exynos support in 3.11, although we don't yet enable it for 3.10. The changes were not included in the earlier multiplatform series in order to avoid clashes with the other Exynos updates. This also includes work from Tomasz Figa to fix the pwm clocksource code on Exynos, which is not strictly required for multiplatform, but related to the other patches in this set and needed as a bug fix for at least one board." * tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits) ARM: dts: exynops4210: really add universal_c210 dts ARM: dts: exynos4210: Add basic dts file for universal_c210 board ARM: dts: exynos4: Add node for PWM device ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core clocksource: samsung_pwm_timer: Correct programming of clock events clocksource: samsung_pwm_timer: Use proper clockevents max_delta clocksource: samsung_pwm_timer: Add support for non-DT platforms clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct clocksource: samsung_pwm_timer: Keep all driver data in a structure clocksource: samsung_pwm_timer: Make PWM spinlock global clocksource: samsung_pwm_timer: Let platforms select the driver Documentation: Add device tree bindings for Samsung PWM timers clocksource: add samsung pwm timer driver irqchip: exynos: look up irq using irq_find_mapping irqchip: exynos: pass irq_base from platform irqchip: exynos: localize irq lookup for ATAGS irqchip: exynos: allocate combiner_data dynamically irqchip: exynos: pass max combiner number to combiner_init ARM: exynos: add missing properties for combiner IRQs ...
| * Merge branch 'exynos/pwm-clocksource' into late/multiplatformArnd Bergmann2013-05-061-0/+9
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series from Tomasz Figa restores support for the pwm clocksource in Exynos, which was broken during the conversion of the platform to the common clk framework. The clocksource is only used in one board in the mainline kernel (universal_c210), and this makes it work for DT based probing as well as restoring the non-DT based case. * exynos/pwm-clocksource: ARM: dts: exynops4210: really add universal_c210 dts ARM: dts: exynos4210: Add basic dts file for universal_c210 board ARM: dts: exynos4: Add node for PWM device ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core clocksource: samsung_pwm_timer: Correct programming of clock events clocksource: samsung_pwm_timer: Use proper clockevents max_delta clocksource: samsung_pwm_timer: Add support for non-DT platforms clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct clocksource: samsung_pwm_timer: Keep all driver data in a structure clocksource: samsung_pwm_timer: Make PWM spinlock global clocksource: samsung_pwm_timer: Let platforms select the driver Documentation: Add device tree bindings for Samsung PWM timers clocksource: add samsung pwm timer driver Conflicts: arch/arm/boot/dts/Makefile arch/arm/mach-exynos/common.c drivers/clocksource/Kconfig drivers/clocksource/Makefile Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * clocksource: samsung_pwm_timer: Add support for non-DT platformsTomasz Figa2013-04-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the driver to support platforms that still use legacy ATAGS-based boot, without device tree, by providing an exported function that can be used from platform code to initialize the clocksource. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * clocksource: samsung_pwm_timer: Let platforms select the driverTomasz Figa2013-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the way of enabling the driver to let the platforms select it in their Kconfig instead of specifying particular platforms in Kconfig entry of the driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * clocksource: add samsung pwm timer driverTomasz Figa2013-04-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new clocksource driver for the PWM timer that is present in most Samsung SoCs, based on the existing driver in arch/arm/plat-samsung/samsung-time.c and many changes implemented by Tomasz Figa. Originally, the conversion of all Samsung machines to the new driver was planned for 3.10, but that work ended up being too late and too invasive just before the merge window. Unfortunately, other changes in the Exynos platform resulted in some Exynos4 setups, particularly the Universal C210 board to be broken. In order to fix that with minimum risk, so we now leave the existing pwm clocksource driver in place for all older platforms and use the new driver only for device tree enabled boards. This way, we can get the broken machines running again using DT descriptions. All clocksource changes were implemented by Tomasz, while the DT registration was rewritten by Arnd. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
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